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FIX: fix the order of the UART fragments

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This commit is contained in:
-T.K.-
2023-12-18 13:29:13 -08:00
parent cd84d9e866
commit af87056768
1 changed files with 3 additions and 3 deletions
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6
generators/chipyard/src/main/scala/config/SpikeConfigs.scala
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@@ -18,8 +18,8 @@ class dmiSpikeConfig extends Config(
// Avoids polling on the UART registers
class SpikeFastUARTConfig extends Config(
new chipyard.WithNSpikeCores(1) ++
new chipyard.config.WithNoUART() ++
new chipyard.config.WithUART(txEntries=128, rxEntries=128) ++
new chipyard.config.WithNoUART() ++
new chipyard.config.WithMemoryBusFrequency(2) ++
new chipyard.config.WithPeripheryBusFrequency(2) ++
new chipyard.config.AbstractConfig)
@@ -28,8 +28,8 @@ class SpikeFastUARTConfig extends Config(
class SpikeUltraFastConfig extends Config(
new chipyard.WithSpikeTCM ++
new chipyard.WithNSpikeCores(1) ++
new chipyard.config.WithNoUART() ++
new chipyard.config.WithUART(txEntries=128, rxEntries=128) ++
new chipyard.config.WithNoUART() ++
new chipyard.config.WithMemoryBusFrequency(2) ++
new chipyard.config.WithPeripheryBusFrequency(2) ++
new chipyard.config.WithBroadcastManager ++
@@ -49,8 +49,8 @@ class SpikeUltraFastDevicesConfig extends Config(
new chipyard.WithSpikeTCM ++
new chipyard.WithNSpikeCores(1) ++
new chipyard.config.WithNoUART() ++
new chipyard.config.WithUART(txEntries=128, rxEntries=128) ++
new chipyard.config.WithNoUART() ++
new chipyard.config.WithMemoryBusFrequency(2) ++
new chipyard.config.WithPeripheryBusFrequency(2) ++
new chipyard.config.WithBroadcastManager ++