Rename Endpoint -> Bridge

2019-10-06 03:32:50 +00:00
parent ad76e0ad1c
commit aa6e09f800
4 changed files with 30 additions and 30 deletions
--- a/docs/Simulation/FPGA-Accelerated-Simulators.rst
+++ b/docs/Simulation/FPGA-Accelerated-Simulators.rst
@@ -87,4 +87,4 @@ will look as follows:
 You should then be able to refer to those classes or an alias of them in your ``DESIGN`` or ``TARGET_CONFIG``
 variables. Note that if your target machine has I/O not provided in the default
 FireChip targets (see ``generators/firechip/src/main/scala/Targets.scala``) you may need
-to write a custom endpoint.
+to write a custom bridge.