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Precisely specify bus frequencies

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This commit is contained in:
Jerry Zhao
2023-10-31 14:25:16 -07:00
parent 59fd67df57
commit a8766ea8fc
8 changed files with 24 additions and 5 deletions
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2
fpga/src/main/scala/arty/Configs.scala
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@@ -27,6 +27,8 @@ class WithArtyTweaks extends Config(
new chipyard.harness.WithAllClocksFromHarnessClockInstantiator ++
new chipyard.config.WithDTSTimebase(32000) ++
new chipyard.config.WithSystemBusFrequency(32) ++
new chipyard.config.WithFrontBusFrequency(32) ++
new chipyard.config.WithControlBusFrequency(32) ++
new chipyard.config.WithPeripheryBusFrequency(32) ++
new testchipip.WithNoSerialTL
)