rm *XTypeKey. upstreamed to RC
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@@ -13,14 +13,6 @@ import freechips.rocketchip.subsystem._
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// For subsystem/BusTopology.scala
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// For subsystem/BusTopology.scala
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/**
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* Keys that serve as a means to define crossing types from a Parameters instance
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*/
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case object SbusToMbusXTypeKey extends Field[ClockCrossingType](NoCrossing)
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case object SbusToCbusXTypeKey extends Field[ClockCrossingType](NoCrossing)
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case object CbusToPbusXTypeKey extends Field[ClockCrossingType](SynchronousCrossing())
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case object FbusToSbusXTypeKey extends Field[ClockCrossingType](SynchronousCrossing())
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// Biancolin: This, modified from Henry's email
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// Biancolin: This, modified from Henry's email
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/** Parameterization of a topology containing a banked coherence manager and a bus for attaching memory devices. */
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/** Parameterization of a topology containing a banked coherence manager and a bus for attaching memory devices. */
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case class CoherentMulticlockBusTopologyParams(
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case class CoherentMulticlockBusTopologyParams(
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