From a524adb1b927116550ef83b54360f1f8b6e32182 Mon Sep 17 00:00:00 2001 From: joonho hwangbo Date: Fri, 6 Oct 2023 08:34:15 -0700 Subject: [PATCH] Fix icenet-loopback clock and reset domain (#1612) * Fix * Bump icenet * revert icenet bump | fix harnessbinders --- .../chipyard/src/main/scala/harness/HarnessBinders.scala | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/generators/chipyard/src/main/scala/harness/HarnessBinders.scala b/generators/chipyard/src/main/scala/harness/HarnessBinders.scala index b670fd74..2b522884 100644 --- a/generators/chipyard/src/main/scala/harness/HarnessBinders.scala +++ b/generators/chipyard/src/main/scala/harness/HarnessBinders.scala @@ -106,7 +106,11 @@ class WithBlockDeviceModel extends OverrideHarnessBinder({ class WithLoopbackNIC extends OverrideHarnessBinder({ (system: CanHavePeripheryIceNIC, th: HasHarnessInstantiators, ports: Seq[ClockedIO[NICIOvonly]]) => { implicit val p: Parameters = GetSystemParameters(system) - ports.map { n => NicLoopback.connect(Some(n.bits), p(NICKey)) } + ports.map { n => + withClockAndReset(n.clock, th.harnessBinderReset.asBool) { + NicLoopback.connect(Some(n.bits), p(NICKey)) + } + } } })