Fix Arty merge and errors from CY bump

2020-11-05 15:04:44 -08:00
parent a7ab0dab59
commit a281869041
6 changed files with 89 additions and 106 deletions
--- a/fpga/Makefile
+++ b/fpga/Makefile
@@ -48,7 +48,7 @@ ifeq ($(SUB_PROJECT),arty)
 	MODEL             ?= ArtyFPGATestHarness
 	VLOG_MODEL        ?= ArtyFPGATestHarness
 	MODEL_PACKAGE     ?= chipyard.fpga.arty
-	CONFIG            ?= E300ArtyDevKitConfig
+	CONFIG            ?= TinyRocketArtyConfig
 	CONFIG_PACKAGE    ?= chipyard.fpga.arty
 	GENERATOR_PACKAGE ?= chipyard
 	TB                ?= none # unused