Pass Scala Compilation

This commit is contained in:
Zitao Fang
2020-05-25 21:50:44 -07:00
parent 2edfcb9022
commit a120edd364
5 changed files with 53 additions and 46 deletions

View File

@@ -22,8 +22,7 @@ import sifive.blocks.devices.uart._
import sifive.blocks.devices.spi._
import chipyard.{BuildTop, BuildSystem}
import chipyard.{CoreRegistrar, CoreRegisterEntryBase}
import chipyard.hlist
import chipyard.GenericConfig
/**
* TODO: Why do we need this?