diff --git a/fpga/src/main/scala/arty/IOBinders.scala b/fpga/src/main/scala/arty/IOBinders.scala
index 205f8fcc..78a1f0ee 100644
--- a/fpga/src/main/scala/arty/IOBinders.scala
+++ b/fpga/src/main/scala/arty/IOBinders.scala
@@ -8,7 +8,7 @@ import freechips.rocketchip.devices.debug._
 
 import chipyard.iobinders.{ComposeIOBinder}
 
-class WithResetPassthrough extends ComposeIOBinder({
+class WithDebugResetPassthrough extends ComposeIOBinder({
   (system: HasPeripheryDebugModuleImp) => {
     // Debug module reset
     val io_ndreset: Bool = IO(Output(Bool())).suggestName("ndreset")