Fix bugs in spike-cosim

This commit is contained in:
Jerry Zhao
2023-05-09 17:39:48 -07:00
parent ff3b66e2f2
commit 94f83e319a

View File

@@ -284,9 +284,9 @@ extern "C" void cospike_cosim(long long int cycle,
printf("%d exception %lx\n", cycle, cause); printf("%d exception %lx\n", cycle, cause);
if (valid) { if (valid) {
printf("%d Cosim: %lx", cycle, iaddr); printf("%d Cosim: %lx", cycle, iaddr);
if (has_wdata) { // if (has_wdata) {
printf(" s: %lx", wdata); // printf(" s: %lx", wdata);
} // }
printf("\n"); printf("\n");
} }
if (valid || raise_interrupt || raise_exception) { if (valid || raise_interrupt || raise_exception) {
@@ -299,7 +299,7 @@ extern "C" void cospike_cosim(long long int cycle,
} }
} }
if (valid) { if (valid && !raise_exception) {
if (s_pc != iaddr) { if (s_pc != iaddr) {
printf("%d PC mismatch spike %llx != DUT %llx\n", cycle, s_pc, iaddr); printf("%d PC mismatch spike %llx != DUT %llx\n", cycle, s_pc, iaddr);
if (unlikely(cospike_debug)) { if (unlikely(cospike_debug)) {
@@ -378,6 +378,7 @@ extern "C" void cospike_cosim(long long int cycle,
(csr_addr == 0xf11) || // mvendorid (csr_addr == 0xf11) || // mvendorid
(csr_addr == 0xb00) || // mcycle (csr_addr == 0xb00) || // mcycle
(csr_addr == 0xb02) || // minstret (csr_addr == 0xb02) || // minstret
(csr_addr >= 0x7a0 && csr_addr <= 0x7aa) || // debug trigger registers
(csr_addr >= 0x3b0 && csr_addr <= 0x3ef) // pmpaddr (csr_addr >= 0x3b0 && csr_addr <= 0x3ef) // pmpaddr
)) { )) {
printf("CSR override\n"); printf("CSR override\n");