fixed merge conflict

This commit is contained in:
Ella Schwarz
2021-01-20 21:19:56 -08:00
137 changed files with 4216 additions and 398 deletions

View File

@@ -49,6 +49,7 @@ commands:
- add_ssh_keys:
fingerprints:
- "3e:c3:02:5b:ed:64:8c:b7:b0:04:43:bc:83:43:73:1e"
- "32:d6:89:d2:97:fa:db:de:a8:2d:2a:f2:70:dd:80:89"
- checkout
setup-tools:
@@ -81,12 +82,15 @@ commands:
build-script:
type: string
default: "do-rtl-build.sh"
build-type:
type: string
default: "sim"
steps:
- setup-tools:
tools-version: "<< parameters.tools-version >>"
- run:
name: Building << parameters.group-key >> subproject using Verilator
command: .circleci/<< parameters.build-script >> << parameters.group-key >>
command: .circleci/<< parameters.build-script >> << parameters.group-key >> << parameters.build-type >>
no_output_timeout: << parameters.timeout >>
- save_cache:
key: << parameters.group-key >>-{{ .Branch }}-{{ .Revision }}
@@ -367,6 +371,12 @@ jobs:
project-key: "firesim-multiclock"
run-script: "run-firesim-scala-tests.sh"
timeout: "20m"
prepare-chipyard-fpga:
executor: main-env
steps:
- prepare-rtl:
group-key: "group-fpga"
build-type: "fpga"
# Order and dependencies of jobs to run
workflows:
@@ -505,3 +515,8 @@ workflows:
- install-riscv-toolchain
- install-verilator
- build-extra-tests
# Prepare the fpga builds (just Verilog)
- prepare-chipyard-fpga:
requires:
- install-riscv-toolchain