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fixed merge conflict

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This commit is contained in:
Ella Schwarz
2021-01-20 21:19:56 -08:00
parent fa2da01421 d4f8f56465
commit 925bace660
137 changed files with 4216 additions and 398 deletions
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18
.circleci/README.md
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@@ -34,11 +34,19 @@ Here the key is built from a string where the `checksum` portion converts the fi
This directory contains all the collateral for the Chipyard CI to work.
The following is included:
`build-toolchains.sh` # build either riscv-tools or esp-tools
`create-hash.sh` # create hashes of riscv-tools/esp-tools so circleci caching can work
`do-rtl-build.sh` # use verilator to build a sim executable (remotely)
`config.yml` # main circleci config script to enumerate jobs/workflows
`defaults.sh` # default variables used
`build-toolchains.sh` # build either riscv-tools or esp-tools
`create-hash.sh` # create hashes of riscv-tools/esp-tools so circleci caching can work
`do-rtl-build.sh` # use verilator to build a sim executable (remotely)
`config.yml` # main circleci config script to enumerate jobs/workflows
`defaults.sh` # default variables used
`check-commit.sh` # check that submodule commits are valid
`build-extra-tests.sh` # build default chipyard tests located in tests/
`clean-old-files.sh` # clean up build server files
`do-fpga-rtl-build.sh` # similar to `do-rtl-build` but using fpga/
`install-verilator.sh` # install verilator on build server
`run-firesim-scala-tests.sh` # run firesim scala tests
`run-tests.sh # run tests for a specific set of designs
`images/` # docker image used in CI
How things are setup for Chipyard
---------------------------------

20
.circleci/check-commit.sh
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@@ -120,23 +120,33 @@ dir="vlsi"
branches=("master")
search
submodules=("fpga-shells")
dir="fpga"
branches=("master")
search
# turn off verbose printing to make this easier to read
set +x
# print all result strings
# print 0's
for str in "${all_names[@]}";
do
echo "$str"
if [ 0 = $(echo "$str" | awk '{print$3}') ]; then
echo "$str"
fi
done
# check if there was a non-zero return code
echo ""
# check if there was a non-zero return code and print 1's
EXIT=0
for str in "${all_names[@]}";
do
if [ ! 0 = $(echo "$str" | awk '{print$3}') ]; then
exit 1
echo "$str"
EXIT=1
fi
done
echo "Done checking all submodules"
exit $EXIT

17
.circleci/config.yml
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@@ -49,6 +49,7 @@ commands:
- add_ssh_keys:
fingerprints:
- "3e:c3:02:5b:ed:64:8c:b7:b0:04:43:bc:83:43:73:1e"
- "32:d6:89:d2:97:fa:db:de:a8:2d:2a:f2:70:dd:80:89"
- checkout
setup-tools:
@@ -81,12 +82,15 @@ commands:
build-script:
type: string
default: "do-rtl-build.sh"
build-type:
type: string
default: "sim"
steps:
- setup-tools:
tools-version: "<< parameters.tools-version >>"
- run:
name: Building << parameters.group-key >> subproject using Verilator
command: .circleci/<< parameters.build-script >> << parameters.group-key >>
command: .circleci/<< parameters.build-script >> << parameters.group-key >> << parameters.build-type >>
no_output_timeout: << parameters.timeout >>
- save_cache:
key: << parameters.group-key >>-{{ .Branch }}-{{ .Revision }}
@@ -367,6 +371,12 @@ jobs:
project-key: "firesim-multiclock"
run-script: "run-firesim-scala-tests.sh"
timeout: "20m"
prepare-chipyard-fpga:
executor: main-env
steps:
- prepare-rtl:
group-key: "group-fpga"
build-type: "fpga"
# Order and dependencies of jobs to run
workflows:
@@ -505,3 +515,8 @@ workflows:
- install-riscv-toolchain
- install-verilator
- build-extra-tests
# Prepare the fpga builds (just Verilog)
- prepare-chipyard-fpga:
requires:
- install-riscv-toolchain

10
.circleci/defaults.sh
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@@ -1,7 +1,7 @@
#!/bin/bash
copy () {
rsync -avzp -e 'ssh' $1 $2
rsync -avzp -e 'ssh' --exclude '.git' $1 $2
}
run () {
@@ -33,8 +33,10 @@ REMOTE_ESP_DIR=$REMOTE_WORK_DIR/esp-tools-install
REMOTE_CHIPYARD_DIR=$REMOTE_WORK_DIR/chipyard
REMOTE_SIM_DIR=$REMOTE_CHIPYARD_DIR/sims/verilator
REMOTE_FIRESIM_DIR=$REMOTE_CHIPYARD_DIR/sims/firesim/sim
REMOTE_FPGA_DIR=$REMOTE_CHIPYARD_DIR/fpga
REMOTE_JAVA_OPTS="-Xmx10G -Xss8M"
# Disable the supershell to greatly improve the readability of SBT output when captured by Circle CI
REMOTE_JAVA_ARGS="-Xmx9G -Xss8M -Dsbt.ivy.home=$REMOTE_WORK_DIR/.ivy2 -Dsbt.supershell=false -Dsbt.global.base=$REMOTE_WORK_DIR/.sbt -Dsbt.boot.directory=$REMOTE_WORK_DIR/.sbt/boot"
REMOTE_SBT_OPTS="-Dsbt.ivy.home=$REMOTE_WORK_DIR/.ivy2 -Dsbt.supershell=false -Dsbt.global.base=$REMOTE_WORK_DIR/.sbt -Dsbt.boot.directory=$REMOTE_WORK_DIR/.sbt/boot"
REMOTE_VERILATOR_DIR=$REMOTE_PREFIX-$CIRCLE_SHA1-verilator-install
# local variables (aka within the docker container)
@@ -52,6 +54,7 @@ grouping["group-peripherals"]="chipyard-dmirocket chipyard-blkdev chipyard-spifl
grouping["group-accels"]="chipyard-nvdla chipyard-sha3 chipyard-hwacha chipyard-gemmini chipyard-streaming-fir chipyard-streaming-passthrough"
grouping["group-tracegen"]="tracegen tracegen-boom"
grouping["group-other"]="icenet testchipip"
grouping["group-fpga"]="arty vcu118"
# key value store to get the build strings
declare -A mapping
@@ -82,3 +85,6 @@ mapping["firesim-multiclock"]="SCALA_TEST=firesim.firesim.RocketMulticlockF1Test
mapping["fireboom"]="SCALA_TEST=firesim.firesim.BoomF1Tests"
mapping["icenet"]="SUB_PROJECT=icenet"
mapping["testchipip"]="SUB_PROJECT=testchipip"
mapping["arty"]="SUB_PROJECT=arty verilog"
mapping["vcu118"]="SUB_PROJECT=vcu118 verilog"

31
.circleci/do-rtl-build.sh
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@@ -1,7 +1,11 @@
#!/bin/bash
# create the different verilator builds
# argument is the make command string
# usage:
# do-rtl-build.sh <make command string> sim
# run rtl build for simulations and copy back results
# do-rtl-build.sh <make command string> fpga
# run rtl build for fpga and don't copy back results
# turn echo on and error on earliest command
set -ex
@@ -15,6 +19,7 @@ trap clean EXIT
cd $LOCAL_CHIPYARD_DIR
./scripts/init-submodules-no-riscv-tools.sh
./scripts/init-fpga.sh
# set stricthostkeychecking to no (must happen before rsync)
run "echo \"Ping $SERVER\""
@@ -50,12 +55,23 @@ else
copy $LOCAL_RISCV_DIR/ $SERVER:$REMOTE_RISCV_DIR
fi
# choose what make dir to use
case $2 in
"sim")
REMOTE_MAKE_DIR=$REMOTE_SIM_DIR
;;
"fpga")
REMOTE_MAKE_DIR=$REMOTE_FPGA_DIR
;;
esac
# enter the verilator directory and build the specific config on remote server
run "export RISCV=\"$TOOLS_DIR\"; \
make -C $REMOTE_SIM_DIR clean;"
make -C $REMOTE_MAKE_DIR clean;"
read -a keys <<< ${grouping[$1]}
# need to set the PATH to use the new verilator (with the new verilator root)
for key in "${keys[@]}"
do
run "export RISCV=\"$TOOLS_DIR\"; \
@@ -63,11 +79,14 @@ do
export PATH=\"$REMOTE_VERILATOR_DIR/bin:\$PATH\"; \
export VERILATOR_ROOT=\"$REMOTE_VERILATOR_DIR\"; \
export COURSIER_CACHE=\"$REMOTE_WORK_DIR/.coursier-cache\"; \
make -j$REMOTE_MAKE_NPROC -C $REMOTE_SIM_DIR FIRRTL_LOGLEVEL=info JAVA_ARGS=\"$REMOTE_JAVA_ARGS\" ${mapping[$key]}"
make -j$REMOTE_MAKE_NPROC -C $REMOTE_MAKE_DIR FIRRTL_LOGLEVEL=info JAVA_OPTS=\"$REMOTE_JAVA_OPTS\" SBT_OPTS=\"$REMOTE_SBT_OPTS\" ${mapping[$key]}"
done
run "rm -rf $REMOTE_CHIPYARD_DIR/project"
# copy back the final build
mkdir -p $LOCAL_CHIPYARD_DIR
copy $SERVER:$REMOTE_CHIPYARD_DIR/ $LOCAL_CHIPYARD_DIR
# choose to copy back results
if [ $2 = "sim" ]; then
# copy back the final build
mkdir -p $LOCAL_CHIPYARD_DIR
copy $SERVER:$REMOTE_CHIPYARD_DIR/ $LOCAL_CHIPYARD_DIR
fi

2
.circleci/run-firesim-scala-tests.sh
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@@ -49,4 +49,4 @@ run "export RISCV=\"$TOOLS_DIR\"; \
export PATH=\"$REMOTE_VERILATOR_DIR/bin:\$PATH\"; \
export VERILATOR_ROOT=\"$REMOTE_VERILATOR_DIR\"; \
export COURSIER_CACHE=\"$REMOTE_WORK_DIR/.coursier-cache\"; \
make -C $REMOTE_FIRESIM_DIR JAVA_ARGS=\"$REMOTE_JAVA_ARGS\" testOnly ${mapping[$1]}"
make -C $REMOTE_FIRESIM_DIR JAVA_OPTS=\"$REMOTE_JAVA_OPTS\" SBT_OPTS=\"$REMOTE_SBT_OPTS\" testOnly ${mapping[$1]}"