Add an AXI4 flavor of PWM peripheral.

Also closes #41.

src/main/scala/example/Configs.scala

@@ -26,7 +26,12 @@ class WithExampleTop extends Config((site, here, up) => {
 
 class WithPWM extends Config((site, here, up) => {
   case BuildTop => (clock: Clock, reset: Bool, p: Parameters) =>
-    Module(LazyModule(new ExampleTopWithPWM()(p)).module)
+    Module(LazyModule(new ExampleTopWithPWMTL()(p)).module)
+})
+
+class WithPWMAXI4 extends Config((site, here, up) => {
+  case BuildTop => (clock: Clock, reset: Bool, p: Parameters) =>
+    Module(LazyModule(new ExampleTopWithPWMAXI4()(p)).module)
 })
 
 class WithBlockDeviceModel extends Config((site, here, up) => {
@@ -57,6 +62,8 @@ class RoccExampleConfig extends Config(
 
 class PWMConfig extends Config(new WithPWM ++ new BaseExampleConfig)
 
+class PWMAXI4Config extends Config(new WithPWMAXI4 ++ new BaseExampleConfig)
+
 class SimBlockDeviceConfig extends Config(
   new WithBlockDevice ++ new WithSimBlockDevice ++ new BaseExampleConfig)
 

src/main/scala/example/PWM.scala

@@ -2,6 +2,7 @@ package example
 
 import chisel3._
 import chisel3.util._
+import freechips.rocketchip.amba.axi4._
 import freechips.rocketchip.subsystem.BaseSubsystem
 import freechips.rocketchip.config.{Parameters, Field}
 import freechips.rocketchip.diplomacy._
@@ -33,12 +34,12 @@ class PWMBase(w: Int) extends Module {
   io.pwmout := io.enable && (counter < io.duty)
 }
 
-trait PWMTLBundle extends Bundle {
+trait PWMBundle extends Bundle {
   val pwmout = Output(Bool())
 }
 
-trait PWMTLModule extends HasRegMap {
+trait PWMModule extends HasRegMap {
-  val io: PWMTLBundle
+  val io: PWMBundle
   implicit val p: Parameters
   def params: PWMParams
 
@@ -68,10 +69,15 @@ class PWMTL(c: PWMParams)(implicit p: Parameters)
   extends TLRegisterRouter(
     c.address, "pwm", Seq("ucbbar,pwm"),
     beatBytes = c.beatBytes)(
-      new TLRegBundle(c, _) with PWMTLBundle)(
+      new TLRegBundle(c, _) with PWMBundle)(
-      new TLRegModule(c, _, _) with PWMTLModule)
+      new TLRegModule(c, _, _) with PWMModule)
 
-trait HasPeripheryPWM { this: BaseSubsystem =>
+class PWMAXI4(c: PWMParams)(implicit p: Parameters)
+  extends AXI4RegisterRouter(c.address, beatBytes = c.beatBytes)(
+      new AXI4RegBundle(c, _) with PWMBundle)(
+      new AXI4RegModule(c, _, _) with PWMModule)
+
+trait HasPeripheryPWMTL { this: BaseSubsystem =>
   implicit val p: Parameters
 
   private val address = 0x2000
@@ -83,9 +89,30 @@ trait HasPeripheryPWM { this: BaseSubsystem =>
   pbus.toVariableWidthSlave(Some(portName)) { pwm.node }
 }
 
-trait HasPeripheryPWMModuleImp extends LazyModuleImp {
+trait HasPeripheryPWMTLModuleImp extends LazyModuleImp {
   implicit val p: Parameters
-  val outer: HasPeripheryPWM
+  val outer: HasPeripheryPWMTL
+
+  val pwmout = IO(Output(Bool()))
+
+  pwmout := outer.pwm.module.io.pwmout
+}
+
+trait HasPeripheryPWMAXI4 { this: BaseSubsystem =>
+  implicit val p: Parameters
+
+  private val address = 0x2000
+  private val portName = "pwm"
+
+  val pwm = LazyModule(new PWMAXI4(
+    PWMParams(address, 8 * pbus.beatBytes))(p))
+
+  pbus.toFixedWidthSlave(Some(portName)) { pwm.node := TLToAXI4() }
+}
+
+trait HasPeripheryPWMAXI4ModuleImp extends LazyModuleImp {
+  implicit val p: Parameters
+  val outer: HasPeripheryPWMAXI4
 
   val pwmout = IO(Output(Bool()))
 

src/main/scala/example/Top.scala

@@ -26,13 +26,21 @@ class ExampleTopModule[+L <: ExampleTop](l: L) extends RocketSubsystemModuleImp(
     with HasPeripherySerialModuleImp
     with DontTouch
 
-class ExampleTopWithPWM(implicit p: Parameters) extends ExampleTop
+class ExampleTopWithPWMTL(implicit p: Parameters) extends ExampleTop
-    with HasPeripheryPWM {
+    with HasPeripheryPWMTL {
-  override lazy val module = new ExampleTopWithPWMModule(this)
+  override lazy val module = new ExampleTopWithPWMTLModule(this)
 }
 
-class ExampleTopWithPWMModule(l: ExampleTopWithPWM)
+class ExampleTopWithPWMTLModule(l: ExampleTopWithPWMTL)
-  extends ExampleTopModule(l) with HasPeripheryPWMModuleImp
+  extends ExampleTopModule(l) with HasPeripheryPWMTLModuleImp
+
+class ExampleTopWithPWMAXI4(implicit p: Parameters) extends ExampleTop
+    with HasPeripheryPWMAXI4 {
+  override lazy val module = new ExampleTopWithPWMAXI4Module(this)
+}
+
+class ExampleTopWithPWMAXI4Module(l: ExampleTopWithPWMAXI4)
+  extends ExampleTopModule(l) with HasPeripheryPWMAXI4ModuleImp
 
 class ExampleTopWithBlockDevice(implicit p: Parameters) extends ExampleTop
     with HasPeripheryBlockDevice {