From 8c47f50a73f08968940905093b08a87a66d70db2 Mon Sep 17 00:00:00 2001
From: Jerry Zhao <jerryz123@berkeley.edu>
Date: Mon, 17 Apr 2023 14:07:37 -0700
Subject: [PATCH] Restore vector state as well for cosim loadarch

---
 .../chipyard/src/main/resources/csrc/cospike.cc  | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/generators/chipyard/src/main/resources/csrc/cospike.cc b/generators/chipyard/src/main/resources/csrc/cospike.cc
index 66b2cd29..1c6cd58f 100644
--- a/generators/chipyard/src/main/resources/csrc/cospike.cc
+++ b/generators/chipyard/src/main/resources/csrc/cospike.cc
@@ -189,7 +189,14 @@ extern "C" void cospike_cosim(long long int cycle,
     loadarch_state_t &ls = dtm->loadarch_state[hartid];
     s->pc  = ls.pc;
     s->prv = ls.prv;
+    s->csrmap[CSR_MSTATUS]->write(s->csrmap[CSR_MSTATUS]->read() | MSTATUS_VS | MSTATUS_XS | MSTATUS_FS);
 #define RESTORE(CSRID, csr) s->csrmap[CSRID]->write(ls.csr);
+    RESTORE(CSR_FCSR     , fcsr);
+    RESTORE(CSR_VSTART   , vstart);
+    RESTORE(CSR_VXSAT    , vxsat);
+    RESTORE(CSR_VXRM     , vxrm);
+    RESTORE(CSR_VCSR     , vcsr);
+    RESTORE(CSR_VTYPE    , vtype);
     RESTORE(CSR_STVEC    , stvec);
     RESTORE(CSR_SSCRATCH , sscratch);
     RESTORE(CSR_SEPC     , sepc);
@@ -208,9 +215,18 @@ extern "C" void cospike_cosim(long long int cycle,
     RESTORE(CSR_MIP      , mip);
     RESTORE(CSR_MCYCLE   , mcycle);
     RESTORE(CSR_MINSTRET , minstret);
+    if (ls.VLEN != p->VU.VLEN) {
+      printf("VLEN mismatch loadarch: $d != spike: $d\n", ls.VLEN, p->VU.VLEN);
+      abort();
+    }
+    if (ls.ELEN != p->VU.ELEN) {
+      printf("ELEN mismatch loadarch: $d != spike: $d\n", ls.ELEN, p->VU.ELEN);
+      abort();
+    }
     for (size_t i = 0; i < 32; i++) {
       s->XPR.write(i, ls.XPR[i]);
       s->FPR.write(i, { (uint64_t)ls.FPR[i], (uint64_t)-1 });
+      memcpy(p->VU.reg_file + i * ls.VLEN / 8, ls.VPR[i], ls.VLEN / 8);
     }
     spike_loadarch_done = true;
     p->clear_waiting_for_interrupt();