Pipe through AXI4 MMIO and Slave ports to ChipTop | IOBinders fix

* Fixes bug with AXI4 MMIO ports not being generated properly due to
   IOBinders issue. Additionally adds IOCells to AXI4 ports so that they
   appear in ChipTop
 * Change IOBinders to also require passing p: Parameters
   to child functions. Serialization of type targets via ClassTags fails
   for compound types, so we cannot use `BaseSubsystem with HasSomeTrait`
   as the type target in OverrideIOBinders.

.circleci/config.yml

@@ -287,6 +287,11 @@ jobs:
         steps:
             - prepare-rtl:
                 project-key: "chipyard-spiflashread"
+    prepare-chipyard-mmios:
+        executor: main-env
+        steps:
+            - prepare-rtl:
+                project-key: "chipyard-mmios"
     chipyard-rocket-run-tests:
         executor: main-env
         steps:
@@ -531,6 +536,10 @@ workflows:
                     - install-riscv-toolchain
                     - install-verilator
 
+            - prepare-chipyard-mmios:
+                requires:
+                    - install-riscv-toolchain
+
             # Run the respective tests
 
             # Run the example tests