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Remove hwacha/esp-tools

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This commit is contained in:
Jerry Zhao
2024-04-19 10:32:50 -07:00
parent 5870c6e4d4
commit 838cd9a69f
31 changed files with 16 additions and 9004 deletions
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7
docs/Simulation/Software-RTL-Simulation.rst
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@@ -155,13 +155,6 @@ Therefore, in order to simulate a simple Rocket-based example system we can use:
./simulator-<yourproject>-<yourconfig> ...
All ``make`` targets that can be applied to the default example, can also be applied to custom project using the custom environment variables. For example, the following code example will run the RISC-V assembly benchmark suite on the Hwacha subproject:
.. code-block:: shell
make SUB_PROJECT=hwacha run-asm-tests
Finally, in the ``generated-src/<...>-<package>-<config>/`` directory resides all of the collateral while the generated Verilog source files resides in ``generated-src/<...>-<package>-<config>/gen-collateral`` for the build/simulation.
Specifically, for ``CONFIG=RocketConfig`` the SoC top-level (``TOP``) Verilog file is ``ChipTop.sv`` while the (``Model``) file is ``TestHarness.sv``.