Remove hwacha/esp-tools
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@@ -31,12 +31,6 @@ Processor Cores
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Accelerators
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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**Hwacha**
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A decoupled vector architecture co-processor.
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Hwacha currently implements a non-standard RISC-V extension, using a vector architecture programming model.
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Hwacha integrates with a Rocket or BOOM core using the RoCC (Rocket Custom Co-processor) interface.
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See :ref:`Generators/Hwacha:Hwacha` for more information.
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**Gemmini**
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A matrix-multiply accelerator targeting neural-networks
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@@ -95,10 +89,6 @@ Toolchains
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The riscv-tools repository was previously required to run any RISC-V software, however, many of the riscv-tools components have since been upstreamed to their respective open-source projects (Linux, GNU, etc.).
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Nevertheless, for consistent versioning, as well as software design flexibility for custom hardware, we include the riscv-tools repository and installation in the Chipyard framework.
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**esp-tools**
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A fork of riscv-tools, designed to work with the Hwacha non-standard RISC-V extension.
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This fork can also be used as an example demonstrating how to add additional RoCC accelerators to the ISA-level simulation (Spike) and the higher-level software toolchain (GNU binutils, riscv-opcodes, etc.)
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Software
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-------------------------------------------
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