[skip ci] add power-rtl and power-syn targets
This commit is contained in:
78
vlsi/sim.mk
78
vlsi/sim.mk
@@ -1,4 +1,82 @@
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SIM_CONF = $(OBJ_DIR)/sim-inputs.yml
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SIM_DEBUG_CONF = $(OBJ_DIR)/sim-debug-inputs.yml
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SIM_TIMING_CONF = $(OBJ_DIR)/sim-timing-inputs.yml
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.PHONY: $(SIM_CONF) $(SIM_DEBUG_CONF) $(SIM_TIMING_CONF)
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$(SIM_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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echo "sim.inputs:" > $@
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echo " top_module: $(VLSI_TOP)" >> $@
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echo " tb_name: ''" >> $@ # don't specify -top
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echo " input_files:" >> $@
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for x in $(shell cat $(sim_common_files)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " input_files_meta: 'append'" >> $@
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echo " timescale: '1ns/10ps'" >> $@
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echo " options:" >> $@
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for x in $(filter-out -f $(sim_common_files),$(VCS_NONCC_OPTS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " options_meta: 'append'" >> $@
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echo " defines:" >> $@
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for x in $(subst +define+,,$(PREPROC_DEFINES)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " defines_meta: 'append'" >> $@
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echo " compiler_cc_opts:" >> $@
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for x in $(filter-out "",$(VCS_CXXFLAGS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " compiler_cc_opts_meta: 'append'" >> $@
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echo " compiler_ld_opts:" >> $@
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for x in $(filter-out "",$(VCS_LDFLAGS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " compiler_ld_opts_meta: 'append'" >> $@
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echo " execution_flags_prepend: ['$(PERMISSIVE_ON)']" >> $@
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echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@
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echo " execution_flags:" >> $@
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for x in $(SIM_FLAGS); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " execution_flags_meta: 'append'" >> $@
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ifneq ($(BINARY), )
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echo " benchmarks: ['$(BINARY)']" >> $@
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endif
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echo " tb_dut: 'TestDriver.testHarness.$(VLSI_MODEL_DUT_NAME)'" >> $@
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$(SIM_DEBUG_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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mkdir -p $(output_dir)
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echo "sim.inputs:" > $@
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echo " defines: ['DEBUG']" >> $@
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echo " defines_meta: 'append'" >> $@
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echo " execution_flags:" >> $@
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for x in $(VERBOSE_FLAGS) $(WAVEFORM_FLAG); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " execution_flags_meta: 'append'" >> $@
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echo " saif.mode: 'time'" >> $@
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echo " saif.start_time: '0ns'" >> $@
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echo " saif.end_time: '`bc <<< $(timeout_cycles)*$(CLOCK_PERIOD)`ns'" >> $@
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ifndef USE_VPD
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echo " options:" >> $@
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echo ' - "-kdb"' >> $@
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echo " options_meta: 'append'" >> $@
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echo "sim.outputs.waveforms: ['$(sim_out_name).fsdb']" >> $@
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else
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echo "sim.outputs.waveforms: ['$(sim_out_name).vpd']" >> $@
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endif
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$(SIM_TIMING_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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echo "sim.inputs:" > $@
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echo " defines: ['NTC']" >> $@
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echo " defines_meta: 'append'" >> $@
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echo " timing_annotated: 'true'" >> $@
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# Update hammer top-level sim targets to include our generated sim configs
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redo-sim-rtl: $(SIM_CONF)
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redo-sim-rtl-$(VLSI_TOP): $(SIM_CONF)
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