[skip ci] add power-rtl and power-syn targets
This commit is contained in:
Harrison Liew
137
vlsi/Makefile
137
vlsi/Makefile
@@ -109,122 +109,6 @@ $(SRAM_CONF): $(SRAM_GENERATOR_CONF)
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cd $(vlsi_dir) && $(HAMMER_EXEC) -e $(ENV_YML) $(foreach x,$(INPUT_CONFS) $(SRAM_GENERATOR_CONF), -p $(x)) --obj_dir $(build_dir) sram_generator
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cd $(vlsi_dir) && cp output.json $@
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#########################################################################################
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# simulation input configuration
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#########################################################################################
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include $(base_dir)/vcs.mk
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SIM_FILE_REQS += \
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$(ROCKETCHIP_RSRCS_DIR)/vsrc/TestDriver.v
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# copy files but ignore *.h files in *.f since vcs has +incdir+$(build_dir)
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$(sim_files): $(SIM_FILE_REQS) | $(build_dir)
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cp -f $^ $(build_dir)
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$(foreach file,\
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$^,\
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$(if $(filter %.h,$(file)),\
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,\
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echo "$(addprefix $(build_dir)/, $(notdir $(file)))" >> $@;))
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SIM_CONF = $(OBJ_DIR)/sim-inputs.yml
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SIM_DEBUG_CONF = $(OBJ_DIR)/sim-debug-inputs.yml
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SIM_TIMING_CONF = $(OBJ_DIR)/sim-timing-inputs.yml
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include $(vlsi_dir)/sim.mk
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$(SIM_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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echo "sim.inputs:" > $@
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echo " top_module: $(VLSI_TOP)" >> $@
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echo " tb_name: ''" >> $@ # don't specify -top
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echo " input_files:" >> $@
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for x in $(shell cat $(sim_common_files)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " input_files_meta: 'append'" >> $@
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echo " timescale: '1ns/10ps'" >> $@
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echo " options:" >> $@
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for x in $(filter-out -f $(sim_common_files),$(VCS_NONCC_OPTS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " options_meta: 'append'" >> $@
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echo " defines:" >> $@
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for x in $(subst +define+,,$(PREPROC_DEFINES)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " defines_meta: 'append'" >> $@
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echo " compiler_cc_opts:" >> $@
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for x in $(filter-out "",$(VCS_CXXFLAGS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " compiler_cc_opts_meta: 'append'" >> $@
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echo " compiler_ld_opts:" >> $@
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for x in $(filter-out "",$(VCS_LDFLAGS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " compiler_ld_opts_meta: 'append'" >> $@
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echo " execution_flags_prepend: ['$(PERMISSIVE_ON)']" >> $@
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echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@
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echo " execution_flags:" >> $@
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for x in $(SIM_FLAGS); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " execution_flags_meta: 'append'" >> $@
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ifneq ($(BINARY), )
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echo " benchmarks: ['$(BINARY)']" >> $@
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endif
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echo " tb_dut: 'TestDriver.testHarness.$(VLSI_MODEL_DUT_NAME)'" >> $@
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$(SIM_DEBUG_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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mkdir -p $(output_dir)
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echo "sim.inputs:" > $@
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echo " defines: ['DEBUG']" >> $@
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echo " defines_meta: 'append'" >> $@
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echo " execution_flags:" >> $@
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for x in $(VERBOSE_FLAGS) $(WAVEFORM_FLAG); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " execution_flags_meta: 'append'" >> $@
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echo " saif.mode: 'time'" >> $@
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echo " saif.start_time: '0ns'" >> $@
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echo " saif.end_time: '`bc <<< $(timeout_cycles)*$(CLOCK_PERIOD)`ns'" >> $@
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ifndef USE_VPD
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echo " options:" >> $@
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echo ' - "-kdb"' >> $@
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echo " options_meta: 'append'" >> $@
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echo "sim.outputs.waveforms: ['$(sim_out_name).fsdb']" >> $@
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else
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echo "sim.outputs.waveforms: ['$(sim_out_name).vpd']" >> $@
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endif
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$(SIM_TIMING_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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echo "sim.inputs:" > $@
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echo " defines: ['NTC']" >> $@
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echo " defines_meta: 'append'" >> $@
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echo " timing_annotated: 'true'" >> $@
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POWER_CONF = $(OBJ_DIR)/power-inputs.yml
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include $(vlsi_dir)/power.mk
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$(POWER_CONF): $(VLSI_RTL)
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mkdir -p $(dir $@)
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echo "power.inputs:" > $@
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echo " tb_dut: 'testHarness/$(VLSI_MODEL_DUT_NAME)'" >> $@
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echo " database: '$(OBJ_DIR)/par-rundir/$(VLSI_TOP)_FINAL'" >> $@
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ifneq ($(BINARY), )
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echo " waveforms: [" >> $@
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ifndef USE_VPD
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echo " '$(sim_out_name).fsdb'" >> $@
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else
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echo " '$(sim_out_name).vpd'" >> $@
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endif
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echo " ]" >> $@
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endif
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echo " start_times: ['0ns']" >> $@
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echo " end_times: [" >> $@
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echo " '`bc <<< $(timeout_cycles)*$(CLOCK_PERIOD)`ns'" >> $@
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echo " ]" >> $@
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#########################################################################################
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# synthesis input configuration
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#########################################################################################
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@@ -243,6 +127,27 @@ $(SYN_CONF): $(VLSI_RTL)
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echo ' - "'$$x'"' >> $@; \
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done
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#########################################################################################
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# simulation and power input configuration
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#########################################################################################
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include $(base_dir)/vcs.mk
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SIM_FILE_REQS += \
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$(ROCKETCHIP_RSRCS_DIR)/vsrc/TestDriver.v
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# copy files but ignore *.h files in *.f since vcs has +incdir+$(build_dir)
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$(sim_files): $(SIM_FILE_REQS) | $(build_dir)
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cp -f $^ $(build_dir)
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$(foreach file,\
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$^,\
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$(if $(filter %.h,$(file)),\
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,\
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echo "$(addprefix $(build_dir)/, $(notdir $(file)))" >> $@;))
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include $(vlsi_dir)/sim.mk
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include $(vlsi_dir)/power.mk
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#########################################################################################
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# AUTO BUILD FLOW
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#########################################################################################
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@@ -18,5 +18,6 @@ vlsi.core.sim_tool: "hammer.sim.vcs"
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sim.vcs.version: "S-2021.09-SP1-1"
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# Voltus options
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vlsi.core.power_tool: "hammer.power.voltus"
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power.joules.version: "211"
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power.voltus.version: "211_ISR3"
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# NOTE (about VCS+Voltus versions): if using FSDB, the VCS version should be approx 2 years older than the Voltus version for compatibility
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@@ -1,10 +1,75 @@
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.PHONY: $(POWER_CONF)
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power-par: $(POWER_CONF) sim-par-debug
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power-par-$(VLSI_TOP): $(POWER_CONF) sim-par-debug-$(VLSI_TOP)
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power-par: override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF)
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power-par-$(VLSI_TOP): override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF)
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redo-power-par: $(POWER_CONF)
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redo-power-par-$(VLSI_TOP): $(POWER_CONF)
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redo-power-par: override HAMMER_EXTRA_ARGS += -p $(POWER_CONF)
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redo-power-par-$(VLSI_TOP): override HAMMER_EXTRA_ARGS += -p $(POWER_CONF)
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$(OBJ_DIR)/power-par-%/power-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_POWER_EXTRA_ARGS)
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POWER_CONF = $(OBJ_DIR)/power-inputs.yml
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POWER_RTL_CONF = $(OBJ_DIR)/power-rtl-inputs.yml
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POWER_SYN_CONF = $(OBJ_DIR)/power-syn-inputs.yml
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POWER_PAR_CONF = $(OBJ_DIR)/power-par-inputs.yml
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.PHONY: $(POWER_CONF) $(POWER_RTL_CONF) $(POWER_SYN_CONF) $(POWER_PAR_CONF)
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$(POWER_CONF): $(VLSI_RTL)
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mkdir -p $(dir $@)
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echo "power.inputs:" > $@
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echo " top_module: $(VLSI_TOP)" >> $@
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echo " tb_name: TestDriver" >> $@
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echo " tb_dut: 'testHarness/$(VLSI_MODEL_DUT_NAME)'" >> $@
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ifneq ($(BINARY), )
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echo " waveforms: [" >> $@
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ifndef USE_VPD
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echo " '$(sim_out_name).fsdb'" >> $@
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else
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echo " '$(sim_out_name).vpd'" >> $@
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endif
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echo " ]" >> $@
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endif
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echo " start_times: ['0ns']" >> $@
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echo " end_times: [" >> $@
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echo " '`bc <<< $(timeout_cycles)*$(CLOCK_PERIOD)`ns'" >> $@
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echo " ]" >> $@
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$(POWER_RTL_CONF): $(VLSI_RTL)
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echo "vlsi.core.power_tool: hammer.power.joules" > $@
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echo "power.inputs:" >> $@
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echo " level: rtl" >> $@
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echo " input_files:" >> $@
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for x in $(shell cat $(VLSI_RTL)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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$(POWER_SYN_CONF): $(VLSI_RTL)
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echo "vlsi.core.power_tool: hammer.power.joules" > $@
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echo "power.inputs:" >> $@
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echo " level: syn" >> $@
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$(POWER_PAR_CONF): $(VLSI_RTL)
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echo "vlsi.core.power_tool: hammer.power.voltus" > $@
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echo "power.inputs:" >> $@
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echo " level: par" >> $@
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echo " database: '$(OBJ_DIR)/par-rundir/$(VLSI_TOP)_FINAL'" >> $@
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power-rtl: $(POWER_CONF) $(POWER_RTL_CONF) sim-rtl-debug
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power-rtl-$(VLSI_TOP): $(POWER_CONF) $(POWER_RTL_CONF) sim-rtl-debug-$(VLSI_TOP)
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power-rtl: override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_RTL_CONF)
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power-rtl-$(VLSI_TOP): override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_RTL_CONF)
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redo-power-rtl: $(POWER_CONF) $(POWER_RTL_CONF)
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redo-power-rtl-$(VLSI_TOP): $(POWER_CONF) $(POWER_RTL_CONF)
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redo-power-rtl: override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_RTL_CONF)
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redo-power-rtl-$(VLSI_TOP): override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_RTL_CONF)
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power-syn: $(POWER_CONF) $(POWER_SYN_CONF) sim-syn-debug
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power-syn-$(VLSI_TOP): $(POWER_CONF) $(POWER_SYN_CONF) sim-syn-debug-$(VLSI_TOP)
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power-syn: override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_SYN_CONF)
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power-syn-$(VLSI_TOP): override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_SYN_CONF)
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redo-power-syn: $(POWER_CONF) $(POWER_SYN_CONF)
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redo-power-syn-$(VLSI_TOP): $(POWER_CONF) $(POWER_SYN_CONF)
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redo-power-syn: override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_SYN_CONF)
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redo-power-syn-$(VLSI_TOP): override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_SYN_CONF)
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power-par: $(POWER_CONF) $(POWER_PAR_CONF) sim-par-debug
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power-par-$(VLSI_TOP): $(POWER_CONF) $(POWER_PAR_CONF) sim-par-debug-$(VLSI_TOP)
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power-par: override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_PAR_CONF)
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power-par-$(VLSI_TOP): override HAMMER_POWER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_PAR_CONF)
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redo-power-par: $(POWER_CONF) $(POWER_PAR_CONF)
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redo-power-par-$(VLSI_TOP): $(POWER_CONF) $(POWER_PAR_CONF)
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redo-power-par: override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_PAR_CONF)
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redo-power-par-$(VLSI_TOP): override HAMMER_EXTRA_ARGS += -p $(POWER_CONF) -p $(POWER_PAR_CONF)
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$(OBJ_DIR)/power-%/power-output-full.json: private override HAMMER_EXTRA_ARGS += $(HAMMER_POWER_EXTRA_ARGS)
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78
vlsi/sim.mk
78
vlsi/sim.mk
@@ -1,4 +1,82 @@
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SIM_CONF = $(OBJ_DIR)/sim-inputs.yml
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SIM_DEBUG_CONF = $(OBJ_DIR)/sim-debug-inputs.yml
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SIM_TIMING_CONF = $(OBJ_DIR)/sim-timing-inputs.yml
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.PHONY: $(SIM_CONF) $(SIM_DEBUG_CONF) $(SIM_TIMING_CONF)
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$(SIM_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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echo "sim.inputs:" > $@
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echo " top_module: $(VLSI_TOP)" >> $@
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echo " tb_name: ''" >> $@ # don't specify -top
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echo " input_files:" >> $@
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for x in $(shell cat $(sim_common_files)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " input_files_meta: 'append'" >> $@
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echo " timescale: '1ns/10ps'" >> $@
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echo " options:" >> $@
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for x in $(filter-out -f $(sim_common_files),$(VCS_NONCC_OPTS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " options_meta: 'append'" >> $@
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echo " defines:" >> $@
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for x in $(subst +define+,,$(PREPROC_DEFINES)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " defines_meta: 'append'" >> $@
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echo " compiler_cc_opts:" >> $@
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for x in $(filter-out "",$(VCS_CXXFLAGS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " compiler_cc_opts_meta: 'append'" >> $@
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echo " compiler_ld_opts:" >> $@
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for x in $(filter-out "",$(VCS_LDFLAGS)); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " compiler_ld_opts_meta: 'append'" >> $@
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echo " execution_flags_prepend: ['$(PERMISSIVE_ON)']" >> $@
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echo " execution_flags_append: ['$(PERMISSIVE_OFF)']" >> $@
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echo " execution_flags:" >> $@
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for x in $(SIM_FLAGS); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " execution_flags_meta: 'append'" >> $@
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ifneq ($(BINARY), )
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echo " benchmarks: ['$(BINARY)']" >> $@
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endif
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echo " tb_dut: 'TestDriver.testHarness.$(VLSI_MODEL_DUT_NAME)'" >> $@
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$(SIM_DEBUG_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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mkdir -p $(output_dir)
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echo "sim.inputs:" > $@
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echo " defines: ['DEBUG']" >> $@
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echo " defines_meta: 'append'" >> $@
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echo " execution_flags:" >> $@
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for x in $(VERBOSE_FLAGS) $(WAVEFORM_FLAG); do \
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echo ' - "'$$x'"' >> $@; \
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done
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echo " execution_flags_meta: 'append'" >> $@
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echo " saif.mode: 'time'" >> $@
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echo " saif.start_time: '0ns'" >> $@
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echo " saif.end_time: '`bc <<< $(timeout_cycles)*$(CLOCK_PERIOD)`ns'" >> $@
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ifndef USE_VPD
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echo " options:" >> $@
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echo ' - "-kdb"' >> $@
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echo " options_meta: 'append'" >> $@
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echo "sim.outputs.waveforms: ['$(sim_out_name).fsdb']" >> $@
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else
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echo "sim.outputs.waveforms: ['$(sim_out_name).vpd']" >> $@
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endif
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$(SIM_TIMING_CONF): $(sim_common_files)
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mkdir -p $(dir $@)
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echo "sim.inputs:" > $@
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echo " defines: ['NTC']" >> $@
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echo " defines_meta: 'append'" >> $@
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echo " timing_annotated: 'true'" >> $@
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# Update hammer top-level sim targets to include our generated sim configs
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redo-sim-rtl: $(SIM_CONF)
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redo-sim-rtl-$(VLSI_TOP): $(SIM_CONF)
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