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sram flow & firesim flow

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Richard Yan
2024-05-07 14:39:45 -07:00
parent 7fe707f286
commit 81847ae775
3 changed files with 106 additions and 109 deletions
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vlsi/add.mems.conf Normal file
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name dcache_data depth 16 width 1024 ports mwrite,read mask_gran 8
name dcache_tags depth 16 width 24 ports write,read
name cache_mshr depth 8 width 305 ports write,read
name icache_data depth 128 width 1024 ports mwrite,read mask_gran 8
name icache_tags depth 128 width 21 ports write,read