diff --git a/.circleci/do-rtl-build.sh b/.circleci/do-rtl-build.sh index 54996f54..a7c8ad50 100755 --- a/.circleci/do-rtl-build.sh +++ b/.circleci/do-rtl-build.sh @@ -53,15 +53,20 @@ else fi # enter the verilator directory and build the specific config on remote server -run "make -C $REMOTE_SIM_DIR clean" run "export RISCV=\"$TOOLS_DIR\"; \ export LD_LIBRARY_PATH=\"$LD_LIB_DIR\"; \ export PATH=\"$REMOTE_VERILATOR_DIR/bin:\$PATH\"; \ export VERILATOR_ROOT=\"$REMOTE_VERILATOR_DIR\"; \ export COURSIER_CACHE=\"$REMOTE_WORK_DIR/.coursier-cache\"; \ + make -C $REMOTE_SIM_DIR clean; \ make -j$REMOTE_MAKE_NPROC -C $REMOTE_SIM_DIR JAVA_ARGS=\"$REMOTE_JAVA_ARGS\" ${mapping[$1]}" run "rm -rf $REMOTE_CHIPYARD_DIR/project" +# copy back the final build + + +run "rm -rf $REMOTE_CHIPYARD_DIR/project" + # copy back the final build mkdir -p $LOCAL_CHIPYARD_DIR copy $SERVER:$REMOTE_CHIPYARD_DIR/ $LOCAL_CHIPYARD_DIR diff --git a/.circleci/run-tests.sh b/.circleci/run-tests.sh index 4f4779fd..08b95e68 100755 --- a/.circleci/run-tests.sh +++ b/.circleci/run-tests.sh @@ -93,10 +93,10 @@ case $1 in make -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/nvdla.riscv run-binary ;; icenet) - make run-none-fast -C $LOCAL_SIM_DIR ${mapping[$1]} + make run-binary-fast BINARY=none -C $LOCAL_SIM_DIR ${mapping[$1]} ;; testchipip) - make run-none-fast -C $LOCAL_SIM_DIR ${mapping[$1]} + make run-binary-fast BINARY=none -C $LOCAL_SIM_DIR ${mapping[$1]} ;; *) echo "No set of tests for $1. Did you spell it right?" diff --git a/common.mk b/common.mk index f07342de..5b502cb1 100644 --- a/common.mk +++ b/common.mk @@ -3,6 +3,14 @@ ######################################################################################### SHELL=/bin/bash + +ifndef RISCV +$(error RISCV is unset. You must set RISCV yourself, or through the Chipyard auto-generated env file) +else +$(info Running with RISCV=$(RISCV)) +endif + + ######################################################################################### # extra make variables/rules from subprojects # @@ -129,34 +137,30 @@ verilog: $(sim_vsrcs) # helper rules to run simulations ######################################################################################### .PHONY: run-binary run-binary-fast run-binary-debug run-fast -run-binary: $(sim) +run-binary: $(output_dir) $(sim) (set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $(BINARY) >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log) ######################################################################################### # helper rules to run simulator as fast as possible ######################################################################################### -run-binary-fast: $(sim) +run-binary-fast: $(output_dir) $(sim) (set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(PERMISSIVE_OFF) $(BINARY) >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log) run-fast: run-asm-tests-fast run-bmark-tests-fast -run-none: $(output_dir)/none.out - -run-none-fast: $(output_dir)/none.run - -run-none-debug: $(output_dir)/none.vpd - ######################################################################################### # run assembly/benchmarks rules ######################################################################################### -$(output_dir)/%: $(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/% - mkdir -p $(output_dir) +$(output_dir): + mkdir -p $@ + +$(output_dir)/%: $(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/% $(output_dir) ln -sf $< $@ $(output_dir)/%.run: $(output_dir)/% $(sim) @@ -165,14 +169,6 @@ $(output_dir)/%.run: $(output_dir)/% $(sim) $(output_dir)/%.out: $(output_dir)/% $(sim) (set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $< >(spike-dasm > $@) | tee $<.log) -$(output_dir)/none.run: $(sim) - mkdir -p $(output_dir) - (set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(PERMISSIVE_OFF) $< >(spike-dasm > $@) | tee $(output_dir)/none.log) - ######################################################################################### # include build/project specific makefrags made from the generator ######################################################################################### diff --git a/generators/sha3 b/generators/sha3 index a94dcf3a..762d9d08 160000 --- a/generators/sha3 +++ b/generators/sha3 @@ -1 +1 @@ -Subproject commit a94dcf3ae0a0440aade96bcdaa4da685352ae704 +Subproject commit 762d9d08f8ccd96ba7ab12ead6d38a6b57fa8710 diff --git a/generators/testchipip b/generators/testchipip index 4b15061b..bb038fea 160000 --- a/generators/testchipip +++ b/generators/testchipip @@ -1 +1 @@ -Subproject commit 4b15061b6fe77f6793603f799751f1f988144ef7 +Subproject commit bb038feaa1db73bffb3fca55c6d24cb0109875bd diff --git a/generators/utilities/src/main/resources/csrc/emulator.cc b/generators/utilities/src/main/resources/csrc/emulator.cc index 1a5a7ac3..0a3b46da 100644 --- a/generators/utilities/src/main/resources/csrc/emulator.cc +++ b/generators/utilities/src/main/resources/csrc/emulator.cc @@ -35,7 +35,6 @@ extern tsi_t* tsi; extern dtm_t* dtm; extern remote_bitbang_t * jtag; -extern int dramsim; static uint64_t trace_count = 0; bool verbose = false; @@ -51,11 +50,6 @@ double sc_time_stamp() return trace_count; } -extern "C" int vpi_get_vlog_info(void* arg) -{ - return 0; -} - static void usage(const char * program_name) { printf("Usage: %s [EMULATOR OPTION]... [VERILOG PLUSARG]... [HOST OPTION]... BINARY [TARGET OPTION]...\n", @@ -125,7 +119,6 @@ int main(int argc, char** argv) char ** htif_argv = NULL; int verilog_plusargs_legal = 1; - dramsim = 0; opterr = 1; while (1) { @@ -136,7 +129,6 @@ int main(int argc, char** argv) {"seed", required_argument, 0, 's' }, {"rbb-port", required_argument, 0, 'r' }, {"verbose", no_argument, 0, 'V' }, - {"dramsim", no_argument, 0, 'D' }, {"permissive", no_argument, 0, 'p' }, {"permissive-off", no_argument, 0, 'o' }, #if VM_TRACE @@ -147,9 +139,9 @@ int main(int argc, char** argv) }; int option_index = 0; #if VM_TRACE - int c = getopt_long(argc, argv, "-chm:s:r:v:Vx:Dpo", long_options, &option_index); + int c = getopt_long(argc, argv, "-chm:s:r:v:Vx:po", long_options, &option_index); #else - int c = getopt_long(argc, argv, "-chm:s:r:VDpo", long_options, &option_index); + int c = getopt_long(argc, argv, "-chm:s:r:Vpo", long_options, &option_index); #endif if (c == -1) break; retry: @@ -162,7 +154,6 @@ int main(int argc, char** argv) case 's': random_seed = atoi(optarg); break; case 'r': rbb_port = atoi(optarg); break; case 'V': verbose = true; break; - case 'D': dramsim = 1; break; case 'p': opterr = 0; break; case 'o': opterr = 1; break; #if VM_TRACE @@ -198,8 +189,6 @@ int main(int argc, char** argv) #endif else if (arg.substr(0, 12) == "+cycle-count") c = 'c'; - else if (arg == "+dramsim") - c = 'D'; else if (arg == "+permissive") c = 'p'; else if (arg == "+permissive-off") diff --git a/sims/vcs/Makefile b/sims/vcs/Makefile index 83884937..df2dbbe6 100644 --- a/sims/vcs/Makefile +++ b/sims/vcs/Makefile @@ -62,10 +62,6 @@ $(sim_debug): $(sim_vsrcs) $(sim_common_files) $(dramsim_lib) $(EXTRA_SIM_REQS) $(output_dir)/%.vpd: $(output_dir)/% $(sim_debug) (set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) +vcdplusfile=$@ $(PERMISSIVE_OFF) $< >(spike-dasm > $<.out) | tee $<.log) -$(output_dir)/none.vpd: $(sim_debug) - mkdir -p $(output_dir) - (set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) +vcdplusfile=$@ $(PERMISSIVE_OFF) none >(spike-dasm > $(output_dir)/none.out) | tee $(output_dir)/none.log) - ######################################################################################### # general cleanup rule ######################################################################################### diff --git a/sims/vcs/dramsim2_ini b/sims/vcs/dramsim2_ini deleted file mode 120000 index 19d93477..00000000 --- a/sims/vcs/dramsim2_ini +++ /dev/null @@ -1 +0,0 @@ -../../generators/testchipip/src/main/resources/dramsim2_ini \ No newline at end of file diff --git a/sims/verilator/Makefile b/sims/verilator/Makefile index 1b9276ac..667c856c 100644 --- a/sims/verilator/Makefile +++ b/sims/verilator/Makefile @@ -87,6 +87,7 @@ TIMESCALE_OPTS := $(shell verilator --version | perl -lne 'if (/(\d.\d+)/ && $$1 VERILATOR_NONCC_OPTS = \ $(TIMESCALE_OPTS) \ --top-module $(VLOG_MODEL) \ + --vpi \ -Wno-fatal \ $(shell if ! grep -iq "module.*ariane" $(build_dir)/*.*v; then echo "$(CHIPYARD_VERILATOR_FLAGS)"; else echo "$(ARIANE_VERILATOR_FLAGS)"; fi) \ --output-split 10000 \ @@ -146,12 +147,6 @@ $(output_dir)/%.vpd: $(output_dir)/% $(sim_debug) vcd2vpd $@.vcd $@ > /dev/null & (set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) -v$@.vcd $(PERMISSIVE_OFF) $< >(spike-dasm > $<.out) | tee $<.log) -$(output_dir)/none.vpd: $(sim_debug) - mkdir -p $(output_dir) - rm -f $@.vcd && mkfifo $@.vcd - vcd2vpd $@.vcd $@ > /dev/null & - (set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) -v$@.vcd $(PERMISSIVE_OFF) none >(spike-dasm > $(output_dir)/none.out) | tee $(output_dir)/none.log) - ######################################################################################### # general cleanup rule ######################################################################################### diff --git a/sims/verilator/dramsim2_ini b/sims/verilator/dramsim2_ini deleted file mode 120000 index 19d93477..00000000 --- a/sims/verilator/dramsim2_ini +++ /dev/null @@ -1 +0,0 @@ -../../generators/testchipip/src/main/resources/dramsim2_ini \ No newline at end of file diff --git a/variables.mk b/variables.mk index 4d49d5fe..1a3623a2 100644 --- a/variables.mk +++ b/variables.mk @@ -139,9 +139,9 @@ output_dir=$(sim_dir)/output/$(long_name) PERMISSIVE_ON=+permissive PERMISSIVE_OFF=+permissive-off BINARY ?= -override SIM_FLAGS += +dramsim +max-cycles=$(timeout_cycles) +override SIM_FLAGS += +dramsim +dramsim_ini_dir=$(TESTCHIP_DIR)/src/main/resources/dramsim2_ini +max-cycles=$(timeout_cycles) VERBOSE_FLAGS ?= +verbose -sim_out_name = $(subst $() $(),_,$(notdir $(basename $(BINARY))).$(long_name)) +sim_out_name = $(output_dir)/$(subst $() $(),_,$(notdir $(basename $(BINARY)))) ######################################################################################### # build output directory for compilation diff --git a/vlsi/Makefile b/vlsi/Makefile index b7e76c50..42af7ba2 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -99,8 +99,6 @@ SIM_TIMING_CONF = $(OBJ_DIR)/sim-timing-inputs.yml include $(vlsi_dir)/sim.mk $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) $(dramsim_lib) mkdir -p $(dir $@) - mkdir -p $(OBJ_DIR)/$(HAMMER_SIM_RUN_DIR)/$(notdir $(BINARY)) - ln -sf $(base_dir)/generators/testchipip/src/main/resources/dramsim2_ini $(OBJ_DIR)/$(HAMMER_SIM_RUN_DIR)/$(notdir $(BINARY))/dramsim2_ini echo "sim.inputs:" > $@ echo " top_module: $(VLSI_TOP)" >> $@ echo " input_files:" >> $@ @@ -131,7 +129,9 @@ $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_file echo ' - "'$$x'"' >> $@; \ done echo " execution_flags_meta: 'append'" >> $@ +ifneq ($(BINARY), ) echo " benchmarks: ['$(BINARY)']" >> $@ +endif echo " tb_dut: 'testHarness.$(VLSI_HARNESS_DUT_NAME)'" >> $@ $(SIM_DEBUG_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_files) @@ -160,12 +160,14 @@ $(POWER_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_fi echo "power.inputs:" > $@ echo " tb_dut: 'testHarness/$(VLSI_HARNESS_DUT_NAME)'" >> $@ echo " database: '$(OBJ_DIR)/par-rundir/$(VLSI_TOP)_FINAL'" >> $@ +ifneq ($(BINARY), ) echo " saifs: [" >> $@ echo " '$(OBJ_DIR)/sim-par-rundir/$(notdir $(BINARY))/ucli.saif'" >> $@ echo " ]" >> $@ echo " waveforms: [" >> $@ #echo " '$(OBJ_DIR)/sim-par-rundir/$(notdir $(BINARY))/$(sim_out_name).vcd'" >> $@ echo " ]" >> $@ +endif echo " start_times: ['0ns']" >> $@ echo " end_times: [" >> $@ echo " '`bc <<< $(timeout_cycles)*$(CLOCK_PERIOD)`ns'" >> $@ diff --git a/vlsi/hammer b/vlsi/hammer index 9d83bbad..bd94e1ed 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit 9d83bbadc0caaa7f81b4929c4e32333fc5a8d900 +Subproject commit bd94e1ed7a5f70fe85ea833cb89836efefe53dc7 diff --git a/vlsi/hammer-cadence-plugins b/vlsi/hammer-cadence-plugins index f644138b..d905828d 160000 --- a/vlsi/hammer-cadence-plugins +++ b/vlsi/hammer-cadence-plugins @@ -1 +1 @@ -Subproject commit f644138bab11075f267a3f1d72108da13c8a05ab +Subproject commit d905828d68aeb4ff5619418807a8aa6d7376d796 diff --git a/vlsi/hammer-synopsys-plugins b/vlsi/hammer-synopsys-plugins index ef163445..e5ec0da8 160000 --- a/vlsi/hammer-synopsys-plugins +++ b/vlsi/hammer-synopsys-plugins @@ -1 +1 @@ -Subproject commit ef163445eec6362fa6a9bf6be0bd18a5d36c707e +Subproject commit e5ec0da8ad471b075de62989001b282e537416d0