Working up until the MMC attachment

2020-10-14 23:09:49 -07:00
parent dcac9b79df
commit 7f387a254b
7 changed files with 248 additions and 25 deletions
--- a/fpga/Makefile
+++ b/fpga/Makefile
@@ -19,11 +19,11 @@ include $(base_dir)/variables.mk
 # default variables to build the arty example
 SUB_PROJECT       := fpga
 SBT_PROJECT       := fpga_platforms
-MODEL             := VCU118FPGATestHarness
-VLOG_MODEL        := VCU118FPGATestHarness
-MODEL_PACKAGE     := chipyard.fpga.vcu118
+MODEL             := BringupVCU118FPGATestHarness
+VLOG_MODEL        := BringupVCU118FPGATestHarness
+MODEL_PACKAGE     := chipyard.fpga.vcu118.bringup
 CONFIG            := FakeBringupConfig
-CONFIG_PACKAGE    := chipyard.fpga.vcu118
+CONFIG_PACKAGE    := chipyard.fpga.vcu118.bringup
 GENERATOR_PACKAGE := chipyard
 TB                := none # unused
 TOP               := ChipTop