docs label disambiguation

2021-01-08 20:11:21 -08:00
parent 558cff7469
commit 7e092c655b
27 changed files with 72 additions and 69 deletions
--- a/docs/Tools/Chisel-Testers.rst
+++ b/docs/Tools/Chisel-Testers.rst
@@ -4,4 +4,4 @@ Chisel Testers
 `Chisel Testers <https://github.com/freechipsproject/chisel-testers>`__ is a library for writing tests for Chisel designs.
 It provides a Scala API for interacting with a DUT.
 It can use multiple backends, including things such as Treadle and Verilator.
-See :ref:`Treadle and FIRRTL Interpreter` and :ref:`sw-rtl-sim-intro` for more information on these simulation methods.
+See :ref:`Tools/Treadle:Treadle and FIRRTL Interpreter` and :ref:`sw-rtl-sim-intro` for more information on these simulation methods.