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Rename cache/blocks submodules to match new chipsalliance ownership

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This commit is contained in:
Jerry Zhao
2024-01-04 14:09:54 -08:00
parent d9bc036cb6
commit 7c13574769
15 changed files with 37 additions and 37 deletions
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docs/Generators/index.rst
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@@ -26,7 +26,7 @@ so changes to the generators themselves will automatically be used when building
Gemmini
IceNet
TestChipIP
SiFive-Generators
Rocket-Chip-Generators
SHA3
CVA6
Ibex