Fix no-MBUS configs
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@@ -267,8 +267,7 @@ class WithAXI4MemPunchthrough extends OverrideLazyIOBinder({
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(system: CanHaveMasterAXI4MemPort) => {
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implicit val p: Parameters = GetSystemParameters(system)
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val clockSinkNode = p(ExtMem).map(_ => ClockSinkNode(Seq(ClockSinkParameters())))
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val mbus = system.asInstanceOf[HasTileLinkLocations].locateTLBusWrapper(MBUS)
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clockSinkNode.map(_ := mbus.fixedClockNode)
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clockSinkNode.map(_ := system.asInstanceOf[HasTileLinkLocations].locateTLBusWrapper(MBUS).fixedClockNode)
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def clockBundle = clockSinkNode.get.in.head._1
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InModuleBody {
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@@ -288,8 +287,7 @@ class WithAXI4MMIOPunchthrough extends OverrideLazyIOBinder({
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(system: CanHaveMasterAXI4MMIOPort) => {
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implicit val p: Parameters = GetSystemParameters(system)
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val clockSinkNode = p(ExtBus).map(_ => ClockSinkNode(Seq(ClockSinkParameters())))
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val mbus = system.asInstanceOf[HasTileLinkLocations].locateTLBusWrapper(MBUS)
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clockSinkNode.map(_ := mbus.fixedClockNode)
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clockSinkNode.map(_ := system.asInstanceOf[HasTileLinkLocations].locateTLBusWrapper(MBUS).fixedClockNode)
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def clockBundle = clockSinkNode.get.in.head._1
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InModuleBody {
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@@ -9,7 +9,7 @@ class Sodor1StageConfig extends Config(
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage1Factory) ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNMemoryChannels(0) ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNBanks(0) ++
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new chipyard.config.AbstractConfig)
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@@ -18,7 +18,7 @@ class Sodor2StageConfig extends Config(
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage2Factory) ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNMemoryChannels(0) ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNBanks(0) ++
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new chipyard.config.AbstractConfig)
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@@ -27,7 +27,7 @@ class Sodor3StageConfig extends Config(
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage3Factory(ports = 2)) ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNMemoryChannels(0) ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNBanks(0) ++
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new chipyard.config.AbstractConfig)
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@@ -36,7 +36,7 @@ class Sodor3StageSinglePortConfig extends Config(
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage3Factory(ports = 1)) ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNMemoryChannels(0) ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNBanks(0) ++
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new chipyard.config.AbstractConfig)
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@@ -45,7 +45,7 @@ class Sodor5StageConfig extends Config(
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage5Factory) ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNMemoryChannels(0) ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNBanks(0) ++
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new chipyard.config.AbstractConfig)
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@@ -54,6 +54,6 @@ class SodorUCodeConfig extends Config(
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.UCodeFactory) ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNMemoryChannels(0) ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNBanks(0) ++
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new chipyard.config.AbstractConfig)
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