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test multi-channel memory

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Howard Mao
2017-07-18 20:24:32 -07:00
parent 8e910df8ba
commit 752a28893d
3 changed files with 6 additions and 3 deletions
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2
rocket-chip

Submodule rocket-chip updated: af3976aa67...6d0821f19a

5
src/main/scala/example/Configs.scala
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@@ -1,7 +1,7 @@
package example package example
import chisel3._ import chisel3._
import freechips.rocketchip.chip.WithoutTLMonitors import freechips.rocketchip.chip._
import freechips.rocketchip.config.{Parameters, Config} import freechips.rocketchip.config.{Parameters, Config}
import freechips.rocketchip.coreplex.WithRoccExample import freechips.rocketchip.coreplex.WithRoccExample
import freechips.rocketchip.diplomacy.LazyModule import freechips.rocketchip.diplomacy.LazyModule
@@ -76,3 +76,6 @@ class SimNetworkConfig extends Config(
class WithTwoTrackers extends WithNBlockDeviceTrackers(2) class WithTwoTrackers extends WithNBlockDeviceTrackers(2)
class WithFourTrackers extends WithNBlockDeviceTrackers(4) class WithFourTrackers extends WithNBlockDeviceTrackers(4)
class WithTwoMemChannels extends WithNMemoryChannels(2)
class WithFourMemChannels extends WithNMemoryChannels(4)

2
testchipip

Submodule testchipip updated: 80069b22aa...3935fdb073