wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Add a NoCore config - useful for testing

Browse Source
This commit is contained in:
Jerry Zhao
2023-02-13 18:46:20 -08:00
parent f2dfd295e2
commit 74f4c8c1d7
5 changed files with 37 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
generators/chipyard/src/main/scala/config/fragments/PeripheralFragments.scala
View File

@@ -5,7 +5,7 @@ import chisel3._
import chisel3.util.{log2Up}
import freechips.rocketchip.config.{Config}
import freechips.rocketchip.devices.tilelink.{BootROMLocated}
import freechips.rocketchip.devices.tilelink.{BootROMLocated, PLICKey}
import freechips.rocketchip.devices.debug.{Debug, ExportDebug, DebugModuleKey, DMI}
import freechips.rocketchip.stage.phases.TargetDirKey
import freechips.rocketchip.subsystem._
@@ -77,5 +77,9 @@ class WithSerialTLBackingMemory extends Config((site, here, up) => {
})
class WithExtMemIdBits(n: Int) extends Config((site, here, up) => {
case ExtMem => up(ExtMem, site).map(x => x.copy(master = x.master.copy(idBits = n)))
case ExtMem => up(ExtMem, site).map(x => x.copy(master = x.master.copy(idBits = n)))
})
class WithNoPLIC extends Config((site, here, up) => {
case PLICKey => None
})