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add tracegen project

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This commit is contained in:
Howard Mao
2019-07-15 16:36:12 -07:00
parent b09794f548
commit 6a3212c6d7
9 changed files with 297 additions and 2 deletions
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12
generators/firechip/src/main/scala/Targets.scala
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@@ -15,6 +15,7 @@ import boom.system.{BoomRocketSubsystem, BoomRocketSubsystemModuleImp}
import icenet._
import testchipip._
import testchipip.SerialAdapter.SERIAL_IF_WIDTH
import tracegen.{HasTraceGenTiles, HasTraceGenTilesModuleImp}
import sifive.blocks.devices.uart._
import midas.models.AXI4BundleWithEdge
import java.io.File
@@ -174,3 +175,14 @@ class FireSimSupernode(implicit p: Parameters) extends Module {
} }
}
class FireSimTraceGen(implicit p: Parameters) extends BaseSubsystem
with HasHierarchicalBusTopology
with HasTraceGenTiles
with CanHaveFASEDOptimizedMasterAXI4MemPort {
override lazy val module = new FireSimTraceGenModuleImp(this)
}
class FireSimTraceGenModuleImp(outer: FireSimTraceGen)
extends BaseSubsystemModuleImp(outer)
with HasTraceGenTilesModuleImp
with CanHaveFASEDOptimizedMasterAXI4MemPortModuleImp