wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

merge

Browse Source
This commit is contained in:
Richard Yan
2023-10-13 14:29:53 -07:00
parent 246c1e81f0 355fedd79d
commit 69d300d06f
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
generators/chipyard/src/main/scala/config/RocketConfigs.scala
View File

@@ -46,7 +46,7 @@ class RadianceROMConfig extends Config(
new AbstractConfig) new AbstractConfig)
class RadianceConfig extends Config( class RadianceConfig extends Config(
new freechips.rocketchip.subsystem.WithRadianceCores(use_vx_cache = false) ++ new freechips.rocketchip.subsystem.WithRadianceCores(1, useVxCache = false) ++
new freechips.rocketchip.subsystem.WithCoherentBusTopology ++ new freechips.rocketchip.subsystem.WithCoherentBusTopology ++
new WithExtMemSize(BigInt("80000000", 16)) ++ new WithExtMemSize(BigInt("80000000", 16)) ++
new WithRadBootROM() ++ new WithRadBootROM() ++
@@ -54,7 +54,7 @@ class RadianceConfig extends Config(
new AbstractConfig) new AbstractConfig)
class RadianceConfigVortexCache extends Config( class RadianceConfigVortexCache extends Config(
new freechips.rocketchip.subsystem.WithRadianceCores(use_vx_cache = true) ++ new freechips.rocketchip.subsystem.WithRadianceCores(1, useVxCache = true) ++
new freechips.rocketchip.subsystem.WithCoherentBusTopology ++ new freechips.rocketchip.subsystem.WithCoherentBusTopology ++
// new freechips.rocketchip.subsystem.WithNoMemPort ++ // new freechips.rocketchip.subsystem.WithNoMemPort ++
// new testchipip.WithSbusScratchpad(banks=2) ++ // new testchipip.WithSbusScratchpad(banks=2) ++