diff --git a/generators/firechip/src/test/scala/ScalaTestSuite.scala b/generators/firechip/src/test/scala/ScalaTestSuite.scala
index c5af5cda..cf2358d9 100644
--- a/generators/firechip/src/test/scala/ScalaTestSuite.scala
+++ b/generators/firechip/src/test/scala/ScalaTestSuite.scala
@@ -141,9 +141,9 @@ class BoomF1Tests extends FireSimTestSuite("FireSim", "DDR3FRFCFSLLC4MB_FireSimL
 class RocketNICF1Tests extends FireSimTestSuite("FireSim", "WithNIC_DDR3FRFCFSLLC4MB_FireSimRocketConfig", "BaseF1Config") {
   runSuite("verilator")(NICLoopbackTests)
 }
-class ArianeF1Tests extends FireSimTestSuite("FireSim", "WithNIC_DDR3FRFCFSLLC4MB_FireSimArianeConfig", "BaseF1Config") {
-  runSuite("verilator")(NICLoopbackTests)
-}
+//class ArianeF1Tests extends FireSimTestSuite("FireSim", "WithNIC_DDR3FRFCFSLLC4MB_FireSimArianeConfig", "BaseF1Config") {
+//  runSuite("verilator")(NICLoopbackTests)
+//}
 // Disabled until RAM optimizations re-enabled in multiclock
 //class RamModelRocketF1Tests extends FireSimTestSuite("FireSim", "FireSimDualRocketConfig", "BaseF1Config_MCRams")
 //class RamModelBoomF1Tests extends FireSimTestSuite("FireSim", "FireSimBoomConfig", "BaseF1Config_MCRams")