Make FPGA flows use the harnessClockInstantiator
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@@ -22,6 +22,7 @@ class WithNoDesignKey extends Config((site, here, up) => {
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})
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class WithArty100TTweaks extends Config(
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new chipyard.harness.WithAllClocksFromHarnessClockInstantiator ++
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new WithArty100TUARTTSI ++
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new WithArty100TDDRTL ++
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new WithNoDesignKey ++
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