re-added macro placement

2022-09-28 18:58:42 -07:00
parent 16538efa69
commit 6418afc095
2 changed files with 84 additions and 1 deletions
--- a/vlsi/example-designs/sky130-rocket.yml
+++ b/vlsi/example-designs/sky130-rocket.yml
@@ -3,7 +3,7 @@
 # Specify clock signals
 # Rocket/RocketTile names clock signal "clock" instead of "clock_clock"
 vlsi.inputs.clocks: [
-  {name: "clock", period: "10ns", uncertainty: "1ns"}
+  {name: "clock", period: "5ns", uncertainty: "1ns"}
 ]

 # Placement Constraints