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Bump sifive-blocks

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This commit is contained in:
Jerry Zhao
2020-05-05 13:58:01 -07:00
parent 9b94570648
commit 63c46d89c1
8 changed files with 1 additions and 49 deletions
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docs/Customization/Heterogeneous-SoCs.rst
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@@ -56,7 +56,6 @@ Then you could use this new config fragment like the following.
class SixCoreConfig extends Config(
new WithTSI ++
new WithNoGPIO ++
new WithBootROM ++
new WithUART ++
new freechips.rocketchip.subsystem.WithNoMMIOPort ++