Merge pull request #588 from ucb-bar/ariane-decouple

Test Suite Simplification

generators/chipyard/src/main/scala/ConfigFragments.scala

@@ -25,7 +25,7 @@ import sifive.blocks.devices.gpio._
 import sifive.blocks.devices.uart._
 import sifive.blocks.devices.spi._
 
-import chipyard.{BuildTop, BuildSystem}
+import chipyard.{BuildTop, BuildSystem, TestSuitesKey, TestSuiteHelper}
 
 /**
  * TODO: Why do we need this?
@@ -99,16 +99,18 @@ class WithMultiRoCC extends Config((site, here, up) => {
  *
  * @param harts harts to specify which will get a Hwacha
  */
-class WithMultiRoCCHwacha(harts: Int*) extends Config((site, here, up) => {
+class WithMultiRoCCHwacha(harts: Int*) extends Config(
-  case MultiRoCCKey => {
+  new chipyard.config.WithHwachaTest ++
-    up(MultiRoCCKey, site) ++ harts.distinct.map{ i =>
+  new Config((site, here, up) => {
-      (i -> Seq((p: Parameters) => {
+    case MultiRoCCKey => {
-        LazyModule(new Hwacha()(p)).suggestName("hwacha")
+      up(MultiRoCCKey, site) ++ harts.distinct.map{ i =>
-      }))
+        (i -> Seq((p: Parameters) => {
+          LazyModule(new Hwacha()(p)).suggestName("hwacha")
+        }))
+      }
     }
-  }
+  })
-})
+)
-
 
 class WithTraceIO extends Config((site, here, up) => {
   case TilesLocated(InSubsystem) => up(TilesLocated(InSubsystem), site) map {
@@ -130,3 +132,15 @@ class WithNPerfCounters(n: Int = 29) extends Config((site, here, up) => {
     case other => other
   }
 })
+
+class WithHwachaTest extends Config((site, here, up) => {
+  case TestSuitesKey => (tileParams: Seq[TileParams], suiteHelper: TestSuiteHelper, p: Parameters) => {
+    up(TestSuitesKey).apply(tileParams, suiteHelper, p)
+    import hwacha.HwachaTestSuites._
+    suiteHelper.addSuites(rv64uv.map(_("p")))
+    suiteHelper.addSuites(rv64uv.map(_("vp")))
+    suiteHelper.addSuite(rv64sv("p"))
+    suiteHelper.addSuite(hwachaBmarks)
+    "SRC_EXTENSION = $(base_dir)/hwacha/$(src_path)/*.scala" + "\nDISASM_EXTENSION = --extension=hwacha"
+  }
+})

generators/chipyard/src/main/scala/TestSuites.scala

@@ -3,8 +3,8 @@ package chipyard
 import scala.collection.mutable.{LinkedHashSet}
 
 import freechips.rocketchip.subsystem._
-import freechips.rocketchip.tile.{XLen}
+import freechips.rocketchip.tile.{XLen, TileParams}
-import freechips.rocketchip.config.{Parameters}
+import freechips.rocketchip.config.{Parameters, Field, Config}
 import freechips.rocketchip.system.{TestGeneration, RegressionTestSuite, RocketTestSuite}
 
 import boom.common.{BoomTileAttachParams}
@@ -64,133 +64,51 @@ class TestSuiteHelper
   def addSuites(s: Seq[RocketTestSuite]) { s.foreach(addSuite) }
 
   /**
-  * Add BOOM tests (asm, bmark, regression)
+  * Add generic tests (asm, bmark, regression) for all cores.
   */
-  def addBoomTestSuites(implicit p: Parameters) = {
+  def addGenericTestSuites(tiles: Seq[TileParams])(implicit p: Parameters) = {
     val xlen = p(XLen)
-    p(TilesLocated(InSubsystem)).find(_.tileParams.hartId == 0).map {
+    tiles.find(_.hartId == 0).map { tileParams =>
-      case tp: BoomTileAttachParams => {
+      val coreParams = tileParams.core
-        val tileParams = tp.tileParams
+      val vm = coreParams.useVM
-        val coreParams = tileParams.core
+      val env = if (vm) List("p","v") else List("p")
-        val vm = coreParams.useVM
+      coreParams.fpu foreach { case cfg =>
-        val env = if (vm) List("p","v") else List("p")
+        if (xlen == 32) {
-        coreParams.fpu foreach { case cfg =>
+          addSuites(env.map(rv32uf))
-          if (xlen == 32) {
+          if (cfg.fLen >= 64)
-            addSuites(env.map(rv32uf))
+            addSuites(env.map(rv32ud))
-            if (cfg.fLen >= 64) {
+        } else {
-              addSuites(env.map(rv32ud))
+          addSuite(rv32udBenchmarks)
-            }
+          addSuites(env.map(rv64uf))
-          } else if (cfg.fLen >= 64) {
+          if (cfg.fLen >= 64)
             addSuites(env.map(rv64ud))
-            addSuites(env.map(rv64uf))
-            addSuite(rv32udBenchmarks)
-          }
         }
-        if (coreParams.useAtomics) {
-          if (tileParams.dcache.flatMap(_.scratch).isEmpty) {
-            addSuites(env.map(if (xlen == 64) rv64ua else rv32ua))
-          } else {
-            addSuites(env.map(if (xlen == 64) rv64uaSansLRSC else rv32uaSansLRSC))
-          }
-        }
-        if (coreParams.useCompressed) addSuites(env.map(if (xlen == 64) rv64uc else rv32uc))
-        val (rvi, rvu) =
-          if (xlen == 64) ((if (vm) rv64i else rv64pi), rv64u)
-          else            ((if (vm) rv32i else rv32pi), rv32u)
-
-        addSuites(rvi.map(_("p")))
-        addSuites(rvu.map(_("p")))
-        addSuites((if (vm) List("v") else List()).flatMap(env => rvu.map(_(env))))
-        addSuite(benchmarks)
-        addSuite(new RegressionTestSuite(if (xlen == 64) rv64RegrTestNames else rv32RegrTestNames))
       }
-      case _ =>
+      if (coreParams.useAtomics) {
-    }
+        if (tileParams.dcache.flatMap(_.scratch).isEmpty)
-  }
+          addSuites(env.map(if (xlen == 64) rv64ua else rv32ua))
-
+        else
-  /**
+          addSuites(env.map(if (xlen == 64) rv64uaSansLRSC else rv32uaSansLRSC))
-  * Add Rocket tests (asm, bmark, regression)
-  */
-  def addRocketTestSuites(implicit p: Parameters) = {
-    val xlen = p(XLen)
-    p(TilesLocated(InSubsystem)).find(_.tileParams.hartId == 0).map {
-      case tp: RocketTileAttachParams => {
-        val tileParams = tp.tileParams
-        val coreParams = tileParams.core
-        val vm = coreParams.useVM
-        val env = if (vm) List("p","v") else List("p")
-        coreParams.fpu foreach { case cfg =>
-          if (xlen == 32) {
-            addSuites(env.map(rv32uf))
-            if (cfg.fLen >= 64)
-              addSuites(env.map(rv32ud))
-          } else {
-            addSuite(rv32udBenchmarks)
-            addSuites(env.map(rv64uf))
-            if (cfg.fLen >= 64)
-              addSuites(env.map(rv64ud))
-          }
-        }
-        if (coreParams.useAtomics) {
-          if (tileParams.dcache.flatMap(_.scratch).isEmpty)
-            addSuites(env.map(if (xlen == 64) rv64ua else rv32ua))
-          else
-            addSuites(env.map(if (xlen == 64) rv64uaSansLRSC else rv32uaSansLRSC))
-        }
-        if (coreParams.useCompressed) addSuites(env.map(if (xlen == 64) rv64uc else rv32uc))
-        val (rvi, rvu) =
-          if (xlen == 64) ((if (vm) rv64i else rv64pi), rv64u)
-          else            ((if (vm) rv32i else rv32pi), rv32u)
-
-        addSuites(rvi.map(_("p")))
-        addSuites((if (vm) List("v") else List()).flatMap(env => rvu.map(_(env))))
-        addSuite(benchmarks)
-        addSuite(new RegressionTestSuite(if (xlen == 64) rv64RegrTestNames else rv32RegrTestNames))
       }
-      case _ =>
+      if (coreParams.useCompressed) addSuites(env.map(if (xlen == 64) rv64uc else rv32uc))
-    }
+      val (rvi, rvu) =
-  }
+        if (xlen == 64) ((if (vm) rv64i else rv64pi), rv64u)
+        else            ((if (vm) rv32i else rv32pi), rv32u)
 
-  /**
+      addSuites(rvi.map(_("p")))
-  * Add Ariane tests (asm, bmark, regression)
+      addSuites(rvu.map(_("p")))
-  */
+      addSuites((if (vm) List("v") else List()).flatMap(env => rvu.map(_(env))))
-  def addArianeTestSuites(implicit p: Parameters) = {
+      addSuite(benchmarks)
-    val xlen = p(XLen)
+      addSuite(new RegressionTestSuite(if (xlen == 64) rv64RegrTestNames else rv32RegrTestNames))
-    p(TilesLocated(InSubsystem)).find(_.tileParams.hartId == 0).map {
-      case tp: ArianeTileAttachParams => {
-        val tileParams = tp.tileParams
-        val coreParams = tileParams.core
-        val vm = coreParams.useVM
-        val env = if (vm) List("p","v") else List("p")
-        coreParams.fpu foreach { case cfg =>
-          if (xlen == 32) {
-            addSuites(env.map(rv32uf))
-            if (cfg.fLen >= 64)
-              addSuites(env.map(rv32ud))
-          } else {
-            addSuite(rv32udBenchmarks)
-            addSuites(env.map(rv64uf))
-            if (cfg.fLen >= 64)
-              addSuites(env.map(rv64ud))
-          }
-        }
-        if (coreParams.useAtomics) {
-          if (tileParams.dcache.flatMap(_.scratch).isEmpty)
-            addSuites(env.map(if (xlen == 64) rv64ua else rv32ua))
-          else
-            addSuites(env.map(if (xlen == 64) rv64uaSansLRSC else rv32uaSansLRSC))
-        }
-        if (coreParams.useCompressed) addSuites(env.map(if (xlen == 64) rv64uc else rv32uc))
-        val (rvi, rvu) =
-          if (xlen == 64) ((if (vm) rv64i else rv64pi), rv64u)
-          else            ((if (vm) rv32i else rv32pi), rv32u)
-
-        addSuites(rvi.map(_("p")))
-        addSuites((if (vm) List("v") else List()).flatMap(env => rvu.map(_(env))))
-        addSuite(benchmarks)
-        addSuite(new RegressionTestSuite(if (xlen == 64) rv64RegrTestNames else rv32RegrTestNames))
-      }
-      case _ =>
     }
   }
 }
+
+/**
+ * Config key of custom test suite.
+ */
+case object TestSuitesKey extends Field[(Seq[TileParams], TestSuiteHelper, Parameters) => String]((tiles, helper, p) => {
+  helper.addGenericTestSuites(tiles)(p)
+  // Return an empty string as makefile additional snippets
+  ""
+})

generators/chipyard/src/main/scala/config/BoomConfigs.scala

@@ -106,6 +106,7 @@ class HwachaLargeBoomConfig extends Config(
   new chipyard.config.WithBootROM ++
   new chipyard.config.WithUART ++
   new chipyard.config.WithL2TLBs(1024) ++
+  new chipyard.config.WithHwachaTest ++
   new hwacha.DefaultHwachaConfig ++                         // use Hwacha vector accelerator
   new freechips.rocketchip.subsystem.WithNoMMIOPort ++
   new freechips.rocketchip.subsystem.WithNoSlavePort ++

generators/chipyard/src/main/scala/config/HeteroConfigs.scala

@@ -36,6 +36,7 @@ class HwachaLargeBoomAndHwachaRocketConfig extends Config(
   new chipyard.config.WithBootROM ++
   new chipyard.config.WithUART ++
   new chipyard.config.WithL2TLBs(1024) ++
+  new chipyard.config.WithHwachaTest ++
   new hwacha.DefaultHwachaConfig ++                      // add hwacha to all harts
   new boom.common.WithNLargeBooms(1) ++
   new freechips.rocketchip.subsystem.WithNoMMIOPort ++

generators/chipyard/src/main/scala/config/RocketConfigs.scala

@@ -34,6 +34,7 @@ class HwachaRocketConfig extends Config(
   new chipyard.config.WithBootROM ++
   new chipyard.config.WithUART ++
   new chipyard.config.WithL2TLBs(1024) ++
+  new chipyard.config.WithHwachaTest ++
   new hwacha.DefaultHwachaConfig ++                        // use Hwacha vector accelerator
   new freechips.rocketchip.subsystem.WithNoMMIOPort ++
   new freechips.rocketchip.subsystem.WithNoSlavePort ++

generators/chipyard/src/main/scala/stage/phases/AddDefaultTests.scala

@@ -15,10 +15,12 @@ import firrtl.options.Viewer.view
 import freechips.rocketchip.stage.RocketChipOptions
 import freechips.rocketchip.stage.phases.{RocketTestSuiteAnnotation}
 import freechips.rocketchip.system.{RocketTestSuite, TestGeneration}
+import freechips.rocketchip.subsystem.{TilesLocated, InSubsystem}
 import freechips.rocketchip.util.HasRocketChipStageUtils
 import freechips.rocketchip.tile.XLen
 
 import chipyard.TestSuiteHelper
+import chipyard.TestSuitesKey
 
 class AddDefaultTests extends Phase with PreservesAll[Phase] with HasRocketChipStageUtils {
   // Make sure we run both after RocketChip's version of this phase, and Rocket Chip's annotation emission phase
@@ -33,25 +35,11 @@ class AddDefaultTests extends Phase with PreservesAll[Phase] with HasRocketChipS
     val suiteHelper = new TestSuiteHelper
     // Use Xlen as a proxy for detecting if we are a processor-like target
     // The underlying test suites expect this field to be defined
-    if (p.lift(XLen).nonEmpty) {
+    val tileParams = p(TilesLocated(InSubsystem)) map (tp => tp.tileParams)
-      suiteHelper.addRocketTestSuites
+    if (p.lift(XLen).nonEmpty)
-      suiteHelper.addBoomTestSuites
+      // If a custom test suite is set up, use the custom test suite
-      suiteHelper.addArianeTestSuites
+      annotations += CustomMakefragSnippet(p(TestSuitesKey).apply(tileParams, suiteHelper, p))
-    }
 
-    // if hwacha parameter exists then generate its tests
-    // TODO: find a more elegant way to do this. either through
-    // trying to disambiguate BuildRoCC, having a AccelParamsKey,
-    // or having the Accelerator/Tile add its own tests
-    import hwacha.HwachaTestSuites._
-    if (Try(p(hwacha.HwachaNLanes)).getOrElse(0) > 0) {
-      suiteHelper.addSuites(rv64uv.map(_("p")))
-      suiteHelper.addSuites(rv64uv.map(_("vp")))
-      suiteHelper.addSuite(rv64sv("p"))
-      suiteHelper.addSuite(hwachaBmarks)
-      annotations += CustomMakefragSnippet(
-        "SRC_EXTENSION = $(base_dir)/hwacha/$(src_path)/*.scala" + "\nDISASM_EXTENSION = --extension=hwacha")
-    }
     RocketTestSuiteAnnotation(suiteHelper.suites.values.toSeq) +: annotations
   }