Bump fpga-platforms to new organized testchipip

2023-12-19 12:17:00 -08:00
parent 1e5ebf192a
commit 604cb6358f
17 changed files with 19 additions and 22 deletions
--- a/fpga/src/main/scala/vcu118/bringup/IOBinders.scala
+++ b/fpga/src/main/scala/vcu118/bringup/IOBinders.scala
@@ -9,7 +9,7 @@ import freechips.rocketchip.tilelink.{TLBundle}
 import sifive.blocks.devices.gpio.{HasPeripheryGPIOModuleImp}
 import sifive.blocks.devices.i2c.{HasPeripheryI2CModuleImp}

-import testchipip.{HasPeripheryTSIHostWidget, TSIHostWidgetIO}
+import testchipip.tsi.{HasPeripheryTSIHostWidget, TSIHostWidgetIO}

 import chipyard.iobinders.{OverrideIOBinder, Port, TLMemPort}