Bump fpga-platforms to new organized testchipip

2023-12-19 12:17:00 -08:00
parent 1e5ebf192a
commit 604cb6358f
17 changed files with 19 additions and 22 deletions
--- a/fpga/src/main/scala/arty/Configs.scala
+++ b/fpga/src/main/scala/arty/Configs.scala
@@ -11,7 +11,7 @@ import freechips.rocketchip.tile._

 import sifive.blocks.devices.uart._

-import testchipip.{SerialTLKey}
+import testchipip.serdes.{SerialTLKey}

 import chipyard.{BuildSystem}

@@ -30,7 +30,7 @@ class WithArtyTweaks extends Config(
  new chipyard.config.WithFrontBusFrequency(32) ++
  new chipyard.config.WithControlBusFrequency(32) ++
  new chipyard.config.WithPeripheryBusFrequency(32) ++
-  new testchipip.WithNoSerialTL
+  new testchipip.serdes.WithNoSerialTL
 )

 class TinyRocketArtyConfig extends Config(