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model verilator args after vcs make

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This commit is contained in:
abejgonzalez
2019-07-17 11:45:32 -07:00
parent b7bc96b6d6
commit 5cedeea352
2 changed files with 29 additions and 31 deletions
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13
sims/verilator/verilator.mk
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@@ -37,16 +37,3 @@ $(VERILATOR_SRCDIR)/configure: $(VERILATOR_INSTALL_DIR)/verilator-$(VERILATOR_VE
$(VERILATOR_INSTALL_DIR)/verilator-$(VERILATOR_VERSION).tar.gz:
mkdir -p $(dir $@)
wget http://www.veripool.org/ftp/verilator-$(VERILATOR_VERSION).tgz -O $@
#########################################################################################
# verilator binary and flags
#########################################################################################
VERILATOR := $(INSTALLED_VERILATOR) --cc --exe
CXXFLAGS := $(CXXFLAGS) -O1 -std=c++11 -I$(RISCV)/include -D__STDC_FORMAT_MACROS
VERILATOR_FLAGS := --top-module $(VLOG_MODEL) \
+define+PRINTF_COND=\$$c\(\"verbose\",\"\&\&\"\,\"done_reset\"\) \
+define+STOP_COND=\$$c\(\"done_reset\"\) \
--assert \
--output-split 20000 \
-Wno-STMTDLY --x-assign unique \
-O3 -CFLAGS "$(CXXFLAGS) -DTEST_HARNESS=V$(VLOG_MODEL) -DVERILATOR"