[Firechip] Push FASED configs into TargetConfigs.scala

This commit is contained in:
David Biancolin
2019-10-03 02:28:48 +00:00
parent 4df478f23a
commit 5845862525
2 changed files with 11 additions and 6 deletions

View File

@@ -130,10 +130,10 @@ abstract class FireSimTestSuite(
runSuite("verilator")(FastBlockdevTests)
}
class RocketF1Tests extends FireSimTestSuite("FireSimNoNIC", "FireSimRocketChipConfig", "FireSimConfig")
class BoomF1Tests extends FireSimTestSuite("FireBoomNoNIC", "FireSimBoomConfig", "FireSimConfig")
class RocketNICF1Tests extends FireSimTestSuite("FireSim", "FireSimRocketChipConfig", "FireSimConfig") {
class RocketF1Tests extends FireSimTestSuite("FireSimNoNIC", "FireSimRocketChipQuadCoreConfig_DDR3FRFCFSLLC4MB", "BaseF1Config")
class BoomF1Tests extends FireSimTestSuite("FireBoomNoNIC", "FireSimBoomConfig_DDR3FRFCFSLLC4MB", "BaseF1Config")
class RocketNICF1Tests extends FireSimTestSuite("FireSim", "FireSimRocketChipConfig_DDR3FRFCFSLLC4MB", "BaseF1Config") {
runSuite("verilator")(NICLoopbackTests)
}
class RamModelRocketF1Tests extends FireSimTestSuite("FireSimNoNIC", "FireSimRocketChipDualCoreConfig", "Midas2Config")
class RamModelBoomF1Tests extends FireSimTestSuite("FireBoomNoNIC", "FireSimBoomConfig", "Midas2Config")
class RamModelRocketF1Tests extends FireSimTestSuite("FireSimNoNIC", "FireSimRocketChipDualCoreConfig", "BaseF1Config_MCRams")
class RamModelBoomF1Tests extends FireSimTestSuite("FireBoomNoNIC", "FireSimBoomConfig", "BaseF1Config_MCRams")