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Support FireSim diplomatic multiclock

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This commit is contained in:
Jerry Zhao
2020-07-07 17:18:10 -07:00
parent c023cf0688
commit 56e1aeb400
12 changed files with 273 additions and 260 deletions
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2
generators/firechip/src/main/scala/BridgeBinders.scala
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@@ -58,7 +58,7 @@ class WithBlockDeviceBridge extends OverrideIOBinder({
class WithFASEDBridge extends OverrideIOBinder({
(system: CanHaveMasterAXI4MemPort) => {
implicit val p: Parameters = GetSystemParameters(system)
(system.mem_axi4 zip system.memAXI4Node.in).foreach({ case (axi4, (_, edge)) =>
(system.mem_axi4 zip system.memAXI4Node.edges.in).foreach({ case (axi4, edge) =>
val nastiKey = NastiParameters(axi4.r.bits.data.getWidth,
axi4.ar.bits.addr.getWidth,
axi4.ar.bits.id.getWidth)