From 72038b62ccb992ff62076ef3aa8404d49a12839d Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Mon, 18 Jan 2021 16:35:01 -0800 Subject: [PATCH 1/3] Add new DAC paper link --- README.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/README.md b/README.md index 0283da58..b3d48b40 100644 --- a/README.md +++ b/README.md @@ -47,6 +47,10 @@ If used for research, please cite Chipyard by the following publication: } ``` +* **Chipyard** + * A. Amid, et al. *IEEE Micro'20* [PDF](https://ieeexplore.ieee.org/document/9099108). + * A. Amid, et al. *DAC'20* [PDF](https://ieeexplore.ieee.org/document/9218756). + These additional publications cover many of the internal components used in Chipyard. However, for the most up-to-date details, users should refer to the Chipyard docs. * **Generators** From 1dcfa5aa41cd7ad55dcc7a8ebf0fad79c3dc6306 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Mon, 18 Jan 2021 16:35:31 -0800 Subject: [PATCH 2/3] Update AXI4Fragmenter docs --- docs/TileLink-Diplomacy-Reference/Widgets.rst | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/docs/TileLink-Diplomacy-Reference/Widgets.rst b/docs/TileLink-Diplomacy-Reference/Widgets.rst index 12086778..4a4bce7d 100644 --- a/docs/TileLink-Diplomacy-Reference/Widgets.rst +++ b/docs/TileLink-Diplomacy-Reference/Widgets.rst @@ -200,10 +200,11 @@ transactions. AXI4Fragmenter -------------- -The AXI4Fragmenter is similar to the :ref:`TileLink-Diplomacy-Reference/Widgets:TLFragmenter`, except it can only -break multi-beat AXI4 transactions into single-beat transactions. This -effectively serves as an AXI4 to AXI4-Lite converter. The constructor for this -widget does not take any arguments. +The AXI4Fragmenter is similar to the :ref:`TileLink-Diplomacy-Reference/Widgets:TLFragmenter`. +The AXI4Fragmenter slices all AXI accesses into simple power-of-two sized and aligned transfers +of the largest size supported by the manager. This makes it suitable as a first stage transformation +to apply before an AXI4=>TL bridge. It also makes it suitable for placing after TL=>AXI4 bridge +driving an AXI-lite slave. **Example Usage:** From 3bb0870b5414c165380de6c20806102d717c32c1 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Mon, 18 Jan 2021 16:58:38 -0800 Subject: [PATCH 3/3] [ci skip] Fix SonicBOOM citation --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index b3d48b40..1263bf37 100644 --- a/README.md +++ b/README.md @@ -56,7 +56,7 @@ These additional publications cover many of the internal components used in Chip * **Generators** * **Rocket Chip**: K. Asanovic, et al., *UCB EECS TR*. [PDF](http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-17.pdf). * **BOOM**: C. Celio, et al., *Hot Chips 30*. [PDF](https://www.hotchips.org/hc30/1conf/1.03_Berkeley_BROOM_HC30.Berkeley.Celio.v02.pdf). - * **SonicBOOM (BOOMv3): J. Zhao, et al., *CARRV'20*. [PDF](https://carrv.github.io/2020/papers/CARRV2020_paper_15_Zhao.pdf). + * **SonicBOOM (BOOMv3)**: J. Zhao, et al., *CARRV'20*. [PDF](https://carrv.github.io/2020/papers/CARRV2020_paper_15_Zhao.pdf). * **Hwacha**: Y. Lee, et al., *ESSCIRC'14*. [PDF](http://hwacha.org/papers/riscv-esscirc2014.pdf). * **Gemmini**: H. Genc, et al., *arXiv*. [PDF](https://arxiv.org/pdf/1911.09925). * **Sims**