From 55d4b3807ee7b649280f1cdd6df8d8c20b700b54 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 28 May 2023 22:56:47 -0700 Subject: [PATCH] Put reset synchronizers in prci_ctrl_domain Makes physical design simpler if clock/reset devices are all localized to one block --- .../chipyard/src/main/scala/clocking/HasChipyardPRCI.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/generators/chipyard/src/main/scala/clocking/HasChipyardPRCI.scala b/generators/chipyard/src/main/scala/clocking/HasChipyardPRCI.scala index 6a2c82ca..a70ef7f8 100644 --- a/generators/chipyard/src/main/scala/clocking/HasChipyardPRCI.scala +++ b/generators/chipyard/src/main/scala/clocking/HasChipyardPRCI.scala @@ -71,7 +71,7 @@ trait HasChipyardPRCI { this: BaseSubsystem with InstantiatesTiles => // diplomatic IOBinder should drive val frequencySpecifier = ClockGroupFrequencySpecifier(p(ClockFrequencyAssignersKey)) val clockGroupCombiner = ClockGroupCombiner() - val resetSynchronizer = ClockGroupResetSynchronizer() + val resetSynchronizer = prci_ctrl_domain { ClockGroupResetSynchronizer() } val tileClockGater = if (prciParams.enableTileClockGating) { prci_ctrl_domain { TileClockGater(prciParams.baseAddress + 0x00000, tlbus) } } else { ClockGroupEphemeralNode() }