Bump to latest rocket-chip

2023-08-16 14:30:33 -07:00
parent ed96a11a26
commit 5495d05aa0
44 changed files with 462 additions and 76 deletions
--- a/fpga/src/main/scala/arty/TestHarness.scala
+++ b/fpga/src/main/scala/arty/TestHarness.scala
@@ -25,5 +25,11 @@ class ArtyFPGATestHarness(override implicit val p: Parameters) extends ArtyShell
  def referenceClock = clock_32MHz
  def referenceReset = hReset

+  dut_jtag_TCK := DontCare
+  dut_jtag_TMS := DontCare
+  dut_jtag_TDI := DontCare
+  dut_jtag_TDO := DontCare
+  dut_jtag_reset := DontCare
+
  instantiateChipTops()
 }