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Merge pull request #565 from ucb-bar/fix-verilator-permissive

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Upgrade verilator to support permissive args in the same way as vcs
This commit is contained in:
Abraham Gonzalez
2020-05-26 13:03:26 -07:00
committed by GitHub
parent 7ee4cad1e9 a7119fb5ed
commit 540c529d89
4 changed files with 29 additions and 20 deletions
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41
generators/utilities/src/main/resources/csrc/emulator.cc
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@@ -126,27 +126,30 @@ int main(int argc, char** argv)
int verilog_plusargs_legal = 1; int verilog_plusargs_legal = 1;
dramsim = 0; dramsim = 0;
opterr = 1;
while (1) { while (1) {
static struct option long_options[] = { static struct option long_options[] = {
{"cycle-count", no_argument, 0, 'c' }, {"cycle-count", no_argument, 0, 'c' },
{"help", no_argument, 0, 'h' }, {"help", no_argument, 0, 'h' },
{"max-cycles", required_argument, 0, 'm' }, {"max-cycles", required_argument, 0, 'm' },
{"seed", required_argument, 0, 's' }, {"seed", required_argument, 0, 's' },
{"rbb-port", required_argument, 0, 'r' }, {"rbb-port", required_argument, 0, 'r' },
{"verbose", no_argument, 0, 'V' }, {"verbose", no_argument, 0, 'V' },
{"dramsim", no_argument, 0, 'D' }, {"dramsim", no_argument, 0, 'D' },
{"permissive", no_argument, 0, 'p' },
{"permissive-off", no_argument, 0, 'o' },
#if VM_TRACE #if VM_TRACE
{"vcd", required_argument, 0, 'v' }, {"vcd", required_argument, 0, 'v' },
{"dump-start", required_argument, 0, 'x' }, {"dump-start", required_argument, 0, 'x' },
#endif #endif
HTIF_LONG_OPTIONS HTIF_LONG_OPTIONS
}; };
int option_index = 0; int option_index = 0;
#if VM_TRACE #if VM_TRACE
int c = getopt_long(argc, argv, "-chm:s:r:v:Vx:D", long_options, &option_index); int c = getopt_long(argc, argv, "-chm:s:r:v:Vx:Dpo", long_options, &option_index);
#else #else
int c = getopt_long(argc, argv, "-chm:s:r:VD", long_options, &option_index); int c = getopt_long(argc, argv, "-chm:s:r:VDpo", long_options, &option_index);
#endif #endif
if (c == -1) break; if (c == -1) break;
retry: retry:
@@ -160,6 +163,8 @@ int main(int argc, char** argv)
case 'r': rbb_port = atoi(optarg); break; case 'r': rbb_port = atoi(optarg); break;
case 'V': verbose = true; break; case 'V': verbose = true; break;
case 'D': dramsim = 1; break; case 'D': dramsim = 1; break;
case 'p': opterr = 0; break;
case 'o': opterr = 1; break;
#if VM_TRACE #if VM_TRACE
case 'v': { case 'v': {
vcdfile = strcmp(optarg, "-") == 0 ? stdout : fopen(optarg, "w"); vcdfile = strcmp(optarg, "-") == 0 ? stdout : fopen(optarg, "w");
@@ -195,6 +200,10 @@ int main(int argc, char** argv)
c = 'c'; c = 'c';
else if (arg == "+dramsim") else if (arg == "+dramsim")
c = 'D'; c = 'D';
else if (arg == "+permissive")
c = 'p';
else if (arg == "+permissive-off")
c = 'o';
// If we don't find a legacy '+' EMULATOR argument, it still could be // If we don't find a legacy '+' EMULATOR argument, it still could be
// a VERILOG_PLUSARG and not an error. // a VERILOG_PLUSARG and not an error.
else if (verilog_plusargs_legal) { else if (verilog_plusargs_legal) {
@@ -226,9 +235,13 @@ int main(int argc, char** argv)
} }
htif_option++; htif_option++;
} }
std::cerr << argv[0] << ": invalid plus-arg (Verilog or HTIF) \"" if(opterr) {
<< arg << "\"\n"; std::cerr << argv[0] << ": invalid plus-arg (Verilog or HTIF) \""
c = '?'; << arg << "\"\n";
c = '?';
} else {
c = 'p';
}
} }
goto retry; goto retry;
} }

3
sims/vcs/Makefile
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@@ -25,9 +25,6 @@ sim_prefix = simv
sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG) sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)
sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug
PERMISSIVE_ON=+permissive
PERMISSIVE_OFF=+permissive-off
WAVEFORM_FLAG=+vcdplusfile=$(sim_out_name).vpd WAVEFORM_FLAG=+vcdplusfile=$(sim_out_name).vpd
.PHONY: default debug .PHONY: default debug

3
sims/verilator/Makefile
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@@ -28,9 +28,6 @@ sim_prefix = simulator
sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG) sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)
sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug
PERMISSIVE_ON=
PERMISSIVE_OFF=
WAVEFORM_FLAG=-v$(sim_out_name).vcd WAVEFORM_FLAG=-v$(sim_out_name).vcd
.PHONY: default debug .PHONY: default debug

2
variables.mk
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@@ -136,6 +136,8 @@ output_dir=$(sim_dir)/output/$(long_name)
######################################################################################### #########################################################################################
# helper variables to run binaries # helper variables to run binaries
######################################################################################### #########################################################################################
PERMISSIVE_ON=+permissive
PERMISSIVE_OFF=+permissive-off
BINARY ?= BINARY ?=
override SIM_FLAGS += +dramsim +max-cycles=$(timeout_cycles) override SIM_FLAGS += +dramsim +max-cycles=$(timeout_cycles)
VERBOSE_FLAGS ?= +verbose VERBOSE_FLAGS ?= +verbose