From 51960f4345e23fe7365301944c31d40d9fc07116 Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Mon, 3 Jun 2019 19:11:45 -0700 Subject: [PATCH] remove deprecated CHISEL_ARGS --- common.mk | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/common.mk b/common.mk index f7e46608..ff67066a 100644 --- a/common.mk +++ b/common.mk @@ -37,11 +37,9 @@ $(sim_dotf): $(call lookup_scala_srcs,$(base_dir)/generators/utilities/src/main/ ######################################################################################### # create firrtl file rule and variables ######################################################################################### -CHISEL_ARGS ?= - $(FIRRTL_FILE) $(ANNO_FILE): $(SCALA_SOURCES) $(sim_dotf) mkdir -p $(build_dir) - cd $(base_dir) && $(SBT) "project $(SBT_PROJECT)" "runMain $(GENERATOR_PACKAGE).Generator $(CHISEL_ARGS) $(build_dir) $(MODEL_PACKAGE) $(MODEL) $(CONFIG_PACKAGE) $(CONFIG)" + cd $(base_dir) && $(SBT) "project $(SBT_PROJECT)" "runMain $(GENERATOR_PACKAGE).Generator $(build_dir) $(MODEL_PACKAGE) $(MODEL) $(CONFIG_PACKAGE) $(CONFIG)" ######################################################################################### # create verilog files rules and variables