Merge remote-tracking branch 'origin/main' into cospike-integration

docs/Advanced-Concepts/Architectural-Checkpoints.rst

@@ -36,4 +36,3 @@ The target config should also match the architectural configuration of however s
 
    cd sims/vcs
    make CONFIG=dmiRocketConfig run-binary LOADARCH=../../hello.riscv.0x80000000.1000.loadarch
-

docs/Advanced-Concepts/Harness-Clocks.rst

@@ -21,4 +21,3 @@ Take the following example:
     :end-before: DOC include end: HarnessClockInstantiatorEx
 
 Here you can see the ``th.harnessClockInstantiator`` is used to request a clock and reset at ``memFreq`` frequency.
-

docs/Customization/RoCC-Accelerators.rst

@@ -112,4 +112,3 @@ For instance, if we wanted to add the previously defined accelerator and route c
       new RocketConfig)
 
 To add RoCC instructions in your program, use the RoCC C macros provided in ``tests/rocc.h``. You can find examples in the files ``tests/accum.c`` and ``charcount.c``.
-

generators/chipyard/src/main/scala/clocking/DividerOnlyClockGenerator.scala

@@ -91,4 +91,3 @@ class SimplePllConfiguration(
    }
    def referenceSinkParams(): ClockSinkParameters = sinkDividerMap.find(_._2 == 1).get._1
 }
-

generators/chipyard/src/main/scala/clocking/TileClockGater.scala

@@ -45,4 +45,3 @@ class TileClockGater(address: BigInt, beatBytes: Int)(implicit p: Parameters, va
     }): _*)
   }
 }
-

generators/chipyard/src/main/scala/config/BoomConfigs.scala

@@ -67,4 +67,3 @@ class dmiMediumBoomCosimConfig extends Config(
   new chipyard.config.WithDMIDTM ++                              // have debug module expose a clocked DMI port
   new boom.common.WithNMediumBooms(1) ++
   new chipyard.config.AbstractConfig)
-

generators/chipyard/src/main/scala/config/PeripheralDeviceConfigs.scala

@@ -92,4 +92,3 @@ class UARTTSIRocketConfig extends Config(
   new chipyard.config.WithPeripheryBusFrequency(10) ++
   new freechips.rocketchip.subsystem.WithNBigCores(1) ++         // single rocket-core
   new chipyard.config.AbstractConfig)
-

generators/chipyard/src/main/scala/stage/ChipyardOptions.scala

@@ -38,4 +38,3 @@ class ChipyardOptions private[stage] (
       if (!topPackage.isEmpty && !configClass.isEmpty) Some(s"${topPackage.get}.${configClass.get}") else None
   }
 }
-

scripts/generate-ckpt.sh

@@ -138,4 +138,3 @@ rm -rf mem.0x80000000.bin
 
 riscv64-unknown-elf-ld -Tdata=0x80000000 -nmagic --defsym tohost=0x$TOHOST --defsym fromhost=0x$FROMHOST -o $LOADMEM_ELF $RAWMEM_ELF
 rm -rf $RAWMEM_ELF
-

sims/xcelium/arg-reshuffle

@@ -27,4 +27,3 @@ done
 target_args="$target_args +permissive-off"
 
 INPUT_ARGS="$regular_args $target_args"
-

sims/xcelium/xcelium.mk

@@ -62,4 +62,3 @@ PREPROC_DEFINES = \
 	-define RANDOMIZE_REG_INIT \
 	-define RANDOMIZE_GARBAGE_ASSIGN \
 	-define RANDOMIZE_INVALID_ASSIGN
-

software/embench/build.sh

@@ -20,4 +20,3 @@ for bmark in "${bmarks[@]}"
 do
     cp bd/src/$bmark/$bmark $BUILDDIR/
 done
-