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Fix comment in ChipConfigs

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This commit is contained in:
Jerry Zhao
2023-05-26 09:34:44 -07:00
parent 17135368a6
commit 43daa42719
3 changed files with 7 additions and 6 deletions
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6
generators/chipyard/src/main/scala/config/ChipConfigs.scala
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@@ -31,7 +31,7 @@ class ChipLikeRocketConfig extends Config(
//================================== //==================================
// Set up buses // Set up buses
//================================== //==================================
new testchipip.WithOffchipBusManager(MBUS) ++ new testchipip.WithOffchipBusClient(MBUS) ++
new testchipip.WithOffchipBus ++ new testchipip.WithOffchipBus ++
//================================== //==================================
@@ -65,8 +65,8 @@ class ChipBringupHostConfig extends Config(
//============================ //============================
// Setup bus topology on the bringup system // Setup bus topology on the bringup system
//============================ //============================
new testchipip.WithOffchipBusClient(SBUS, // offchip bus hans off the SBUS new testchipip.WithOffchipBusClient(SBUS, // offchip bus hangs off the SBUS
blockRange = AddressSet.misaligned(0x80000000L, (BigInt(1) << 30) * 4)) ++ // offchip bus should not see the main memory of the testchip, since that can be accesses directly through this system blockRange = AddressSet.misaligned(0x80000000L, (BigInt(1) << 30) * 4)) ++ // offchip bus should not see the main memory of the testchip, since that can be accessed directly
new testchipip.WithOffchipBus ++ // offchip bus new testchipip.WithOffchipBus ++ // offchip bus
//============================= //=============================

5
generators/chipyard/src/main/scala/config/PeripheralDeviceConfigs.scala
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@@ -2,6 +2,7 @@ package chipyard
import org.chipsalliance.cde.config.{Config} import org.chipsalliance.cde.config.{Config}
import freechips.rocketchip.diplomacy.{AsynchronousCrossing} import freechips.rocketchip.diplomacy.{AsynchronousCrossing}
import freechips.rocketchip.subsystem.{MBUS}
// --------------------------------------------------------- // ---------------------------------------------------------
// Configs which add non-default peripheral devices or ports // Configs which add non-default peripheral devices or ports
@@ -66,8 +67,8 @@ class dmiRocketConfig extends Config(
class ManyPeripheralsRocketConfig extends Config( class ManyPeripheralsRocketConfig extends Config(
new testchipip.WithBlockDevice ++ // add block-device module to peripherybus new testchipip.WithBlockDevice ++ // add block-device module to peripherybus
new testchipip.WithOffchipBusClient(MBUS) ++ new testchipip.WithOffchipBusClient(MBUS) ++ // OBUS provides backing memory to the MBUS
new testchipip.WithOffchipBus ++ new testchipip.WithOffchipBus ++ // OBUS must exist for serial-tl to master off-chip memory
new testchipip.WithSerialTLMem(isMainMemory=true) ++ // set lbwif memory base to DRAM_BASE, use as main memory new testchipip.WithSerialTLMem(isMainMemory=true) ++ // set lbwif memory base to DRAM_BASE, use as main memory
new chipyard.harness.WithSimSPIFlashModel(true) ++ // add the SPI flash model in the harness (read-only) new chipyard.harness.WithSimSPIFlashModel(true) ++ // add the SPI flash model in the harness (read-only)
new chipyard.harness.WithSimBlockDevice ++ // drive block-device IOs with SimBlockDevice new chipyard.harness.WithSimBlockDevice ++ // drive block-device IOs with SimBlockDevice

2
generators/testchipip

Submodule generators/testchipip updated: 3ecea8610d...456223c916