diff --git a/generators/chipyard/src/main/scala/config/RocketConfigs.scala b/generators/chipyard/src/main/scala/config/RocketConfigs.scala index ebd019a0..805b4704 100644 --- a/generators/chipyard/src/main/scala/config/RocketConfigs.scala +++ b/generators/chipyard/src/main/scala/config/RocketConfigs.scala @@ -35,17 +35,22 @@ class WithRadBootROM(address: BigInt = 0x10000, size: Int = 0x10000, hang: BigIn )) }) +class RadianceROMConfig extends Config( + new freechips.rocketchip.subsystem.WithRadianceCores() ++ + new freechips.rocketchip.subsystem.WithCoherentBusTopology ++ + new WithExtMemSize(BigInt("80000000", 16)) ++ + new WithRadBootROM() ++ + new WithRadROMs(0x7FFF0000L, 0x10000, "sims/vcs/args.bin") ++ + new WithRadROMs(0x20000L, 0x8000, "sims/vcs/op_a.bin") ++ + new WithRadROMs(0x28000L, 0x8000, "sims/vcs/op_b.bin") ++ + new AbstractConfig) + class RadianceConfig extends Config( new freechips.rocketchip.subsystem.WithRadianceCores() ++ new freechips.rocketchip.subsystem.WithCoherentBusTopology ++ - // new freechips.rocketchip.subsystem.WithNoMemPort ++ - // new testchipip.WithSbusScratchpad(banks=2) ++ - // new testchipip.WithMbusScratchpad(banks=2) ++ new WithExtMemSize(BigInt("80000000", 16)) ++ new WithRadBootROM() ++ - new WithRadROMs(0x7FFF0000L, 0x10000, "sims/vcs/args.bin") ++ - new WithRadROMs(0x20000L, 0x8000, "sims/vcs/op_a.bin") ++ - new WithRadROMs(0x28000L, 0x8000, "sims/vcs/op_b.bin") ++ + new testchipip.WithMbusScratchpad(base=0x7FFF0000L, size=0x10000, banks=1) ++ new AbstractConfig) class TinyRocketConfig extends Config( diff --git a/variables.mk b/variables.mk index a3755a3c..8a0544a5 100644 --- a/variables.mk +++ b/variables.mk @@ -224,7 +224,7 @@ BB_MODS_FILELIST ?= $(build_dir)/$(long_name).bb.f # all module files to include (top, model, bb included) ALL_MODS_FILELIST ?= $(build_dir)/$(long_name).all.f -BOOTROM_FILES ?= bootrom.rv64.img bootrom.rv32.img +BOOTROM_FILES ?= bootrom.rv64.img bootrom.rv32.img bootrom.radiance.rv32.img BOOTROM_TARGETS ?= $(addprefix $(build_dir)/, $(BOOTROM_FILES)) # files that contain lists of files needed for VCS or Verilator simulation