Integrate Mempress memory tester (#1253)

This commit is contained in:
joonho hwangbo
2022-10-17 18:41:39 -07:00
committed by GitHub
parent fb2f83b90c
commit 33f5040b5d
12 changed files with 71 additions and 8 deletions

View File

@@ -21,6 +21,16 @@ class TinyRocketConfig extends Config(
new freechips.rocketchip.subsystem.With1TinyCore ++ // single tiny rocket-core
new chipyard.config.AbstractConfig)
class MempressRocketConfig extends Config(
new mempress.WithMemPress ++ // use Mempress (memory traffic generation) accelerator
new freechips.rocketchip.subsystem.WithNBanks(8) ++
new freechips.rocketchip.subsystem.WithInclusiveCache(nWays=16, capacityKB=2048) ++
new chipyard.config.WithExtMemIdBits(7) ++ // use 7 bits for tl like request id
new freechips.rocketchip.subsystem.WithNMemoryChannels(4) ++
new chipyard.config.WithSystemBusWidth(128) ++
new freechips.rocketchip.subsystem.WithNBigCores(1) ++
new chipyard.config.AbstractConfig)
// DOC include start: FFTRocketConfig
class FFTRocketConfig extends Config(
new fftgenerator.WithFFTGenerator(numPoints=8, width=16, decPt=8) ++ // add 8-point mmio fft at the default addr (0x2400) with 16bit fixed-point numbers.

View File

@@ -72,3 +72,7 @@ class WithSerialTLBackingMemory extends Config((site, here, up) => {
)}
})
class WithExtMemIdBits(n: Int) extends Config((site, here, up) => {
case ExtMem => up(ExtMem, site).map(x => x.copy(master = x.master.copy(idBits = n)))
})

1
generators/mempress Submodule

Submodule generators/mempress added at 647519c15e