From 2e778675777848e20d6b3f49a1fd498989fbf140 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sat, 16 Dec 2023 12:24:22 -0800 Subject: [PATCH] [ci skip] Add inline comments on some of the clocking fragments --- .../src/main/scala/config/fragments/ClockingFragments.scala | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/generators/chipyard/src/main/scala/config/fragments/ClockingFragments.scala b/generators/chipyard/src/main/scala/config/fragments/ClockingFragments.scala index 65b73015..eddcb803 100644 --- a/generators/chipyard/src/main/scala/config/fragments/ClockingFragments.scala +++ b/generators/chipyard/src/main/scala/config/fragments/ClockingFragments.scala @@ -111,18 +111,22 @@ class WithOffchipBusFrequency(freqMHz: Double) extends Config((site, here, up) = class WithRationalMemoryBusCrossing extends WithSbusToMbusCrossingType(RationalCrossing(Symmetric)) class WithAsynchrousMemoryBusCrossing extends WithSbusToMbusCrossingType(AsynchronousCrossing()) +// Remove the tile clock gaters in this system class WithNoTileClockGaters extends Config((site, here, up) => { case ChipyardPRCIControlKey => up(ChipyardPRCIControlKey).copy(enableTileClockGating = false) }) +// Remove the tile reset control blocks in this system class WithNoTileResetSetters extends Config((site, here, up) => { case ChipyardPRCIControlKey => up(ChipyardPRCIControlKey).copy(enableTileResetSetting = false) }) +// Remove the global reset synchronizers in this system class WithNoResetSynchronizers extends Config((site, here, up) => { case ChipyardPRCIControlKey => up(ChipyardPRCIControlKey).copy(enableResetSynchronizers = false) }) +// Remove any ClockTap ports in this system class WithNoClockTap extends Config((site, here, up) => { case ClockTapKey => None })