wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

[skip ci] abandon sv2v, Genus happy with patched firtool

Browse Source
This commit is contained in:
Harrison Liew
2023-02-08 19:00:26 -08:00
parent 61d094e887
commit 2bfc6e1347
4 changed files with 3 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
vlsi/Makefile
View File

@@ -80,17 +80,8 @@ $(VLSI_RTL): $(RTL_DEPS)
ifneq ($(CUSTOM_VLOG), )
> $(VLSI_RTL)
$(foreach file,$^,echo $(file) >> $(VLSI_RTL))
else ifneq ($(CONVERT_SV2V), )
# Convert System Verilog to Verilog, uniquify, remove incompatible tasks
sv2v -w=adjacent --oversized-numbers \
-D=ASSERT_VERBOSE_COND=0 -D=STOP_COND=0 -D=PRINTF_COND=0 \
$(filter-out %.v,$(shell cat $(TOP_MODS_FILELIST) $(TOP_BB_MODS_FILELIST)))
cat $(TOP_MODS_FILELIST) $(TOP_BB_MODS_FILELIST) | sort -u | sed 's/.sv/.v/g' > $(VLSI_RTL)
cat $(VLSI_RTL) | xargs sed -i 's/\$$fwrite.*/;/g'
echo $(TOP_SMEMS_FILE) >> $(VLSI_RTL)
echo $(build_dir)/EICG_wrapper.v >> $(VLSI_RTL)
else
cat $(TOP_MODS_FILELIST) $(TOP_BB_MODS_FILELIST) | sort -u | > $(VLSI_RTL)
cat $(TOP_MODS_FILELIST) $(TOP_BB_MODS_FILELIST) | sort -u > $(VLSI_RTL)
echo $(TOP_SMEMS_FILE) >> $(VLSI_RTL)
echo $(build_dir)/EICG_wrapper.v >> $(VLSI_RTL)
endif