Run pre-commit on all files

This commit is contained in:
abejgonzalez
2022-12-21 15:59:46 -08:00
parent d63c3cb72e
commit 292cc753ce
59 changed files with 76 additions and 115 deletions

View File

@@ -20,7 +20,7 @@ vlsi.inputs.clocks: [
{name: "clock_clock", period: "1ns", uncertainty: "0.1ns"}
]
# Generate Make include to aid in flow
# Generate Make include to aid in flow
vlsi.core.build_system: make
# Placement Constraints
@@ -52,7 +52,7 @@ vlsi.inputs.placement_constraints:
top_layer: "M4"
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain/tile/dcache/data/data_arrays_0/data_arrays_0_ext/mem_0_2"
type: hardmacro
x: 675
x: 675
y: 25
orientation: "r0"
top_layer: "M4"

View File

@@ -1,6 +1,6 @@
# General Hammer Inputs Related to the Design and Build System
# Generate Make include to aid in flow
# Generate Make include to aid in flow
vlsi.core.build_system: make
vlsi.core.max_threads: 12

View File

@@ -19,7 +19,6 @@ par.generate_power_straps_options:
- met5
blockage_spacing_met2: 4.0
blockage_spacing_met4: 2.0
blockage_spacing_met4: 2.0
track_width: 3
track_width_met5: 1
track_spacing: 5
@@ -74,22 +73,22 @@ vlsi.inputs.placement_constraints:
y: 1900
orientation: r0
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain/tile/dcache/data/data_arrays_0/data_arrays_0_ext/mem_5_0"
type: hardmacro
x: 1000
x: 1000
y: 1300
orientation: r0
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain/tile/dcache/data/data_arrays_0/data_arrays_0_ext/mem_6_0"
type: hardmacro
x: 1000
x: 1000
y: 700
orientation: r0
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain/tile/dcache/data/data_arrays_0/data_arrays_0_ext/mem_7_0"
type: hardmacro
x: 1000
x: 1000
y: 100
orientation: r0
@@ -124,7 +123,7 @@ vlsi.inputs.placement_constraints:
x: 2000
y: 1900
orientation: "r0"
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain/tile/ptw/l2_tlb_ram/l2_tlb_ram_ext/mem_0_2"
type: hardmacro
x: 2750

View File

@@ -51,22 +51,22 @@ vlsi.inputs.placement_constraints:
y: 1900
orientation: r0
- path: "ChipTop/system.tile_prci_domain.tile_reset_domain.tile.dcache.data.data_arrays_0.data_arrays_0_ext.mem_5_0"
type: hardmacro
x: 1000
x: 1000
y: 1300
orientation: r0
- path: "ChipTop/system.tile_prci_domain.tile_reset_domain.tile.dcache.data.data_arrays_0.data_arrays_0_ext.mem_6_0"
type: hardmacro
x: 1000
x: 1000
y: 700
orientation: r0
- path: "ChipTop/system.tile_prci_domain.tile_reset_domain.tile.dcache.data.data_arrays_0.data_arrays_0_ext.mem_7_0"
type: hardmacro
x: 1000
x: 1000
y: 100
orientation: r0
@@ -87,4 +87,4 @@ vlsi.inputs.placement_constraints:
type: hardmacro
x: 3450
y: 1300
orientation: r0
orientation: r0

View File

@@ -19,4 +19,4 @@ vlsi.inputs.placement_constraints:
left: 10
right: 10
top: 10
bottom: 10
bottom: 10

View File

@@ -7,7 +7,7 @@ vlsi.core.max_threads: 12
# Technology paths
technology.sky130:
sky130A: "/path/to/sky130A"
openram_lib: "/path/to/sky130_sram_macros"
openram_lib: "/path/to/sky130_sram_macros"
# this key is OPTIONAL, no NDA files will be used if it does not point to a valid path
sky130_nda: "/path/to/skywater-src-nda"
@@ -23,7 +23,7 @@ vlsi.inputs.clocks: [
{name: "clock_clock", period: "10ns", uncertainty: "1ns"}
]
# Generate Make include to aid in flow
# Generate Make include to aid in flow
vlsi.core.build_system: make
# Placement Constraints
@@ -54,7 +54,6 @@ par.generate_power_straps_options:
- met5
blockage_spacing_met2: 4.0
blockage_spacing_met4: 2.0
blockage_spacing_met4: 2.0
track_width: 3
track_width_met5: 1
track_spacing: 5

View File

@@ -56,7 +56,7 @@ class ExampleDriver(CLIDriver):
# The target step in any of the above calls may be a default step or another one of your custom hooks
]
return extra_hooks
return extra_hooks
if __name__ == '__main__':
ExampleDriver().main()

View File

@@ -58,7 +58,7 @@ class ExampleDriver(CLIDriver):
# The target step in any of the above calls may be a default step or another one of your custom hooks
]
return extra_hooks
return extra_hooks
if __name__ == '__main__':
ExampleDriver().main()

View File

@@ -20,7 +20,7 @@ ifeq ($(tutorial),sky130-commercial)
TECH_CONF ?= example-sky130.yml
DESIGN_CONF ?= example-designs/sky130-commercial.yml
EXTRA_CONFS ?= $(if $(filter $(VLSI_TOP),Rocket), example-designs/sky130-rocket.yml, )
INPUT_CONFS ?= $(TOOLS_CONF) $(TECH_CONF) $(DESIGN_CONF) $(EXTRA_CONFS)
INPUT_CONFS ?= $(TOOLS_CONF) $(TECH_CONF) $(DESIGN_CONF) $(EXTRA_CONFS)
VLSI_OBJ_DIR ?= build-sky130-commercial
endif
@@ -31,6 +31,6 @@ ifeq ($(tutorial),sky130-openroad)
TECH_CONF ?= example-sky130.yml
DESIGN_CONF ?= example-designs/sky130-openroad.yml
EXTRA_CONFS ?= $(if $(filter $(VLSI_TOP),Rocket), example-designs/sky130-rocket.yml, )
INPUT_CONFS ?= $(TOOLS_CONF) $(TECH_CONF) $(DESIGN_CONF) $(EXTRA_CONFS)
INPUT_CONFS ?= $(TOOLS_CONF) $(TECH_CONF) $(DESIGN_CONF) $(EXTRA_CONFS)
VLSI_OBJ_DIR ?= build-sky130-openroad
endif